1/12July 2001
■ HIGH SPEED:
t
PD
= 13ns (TYP.) at V
CC
= 6V
■ LOW POWER DISSIPATION:
I
CC
= 4µA(MAX.) at T
A
=25°C
■ HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 6mA (MIN)
■ BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
■ WIDE OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 6V
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 563
DESCRIPTION
The M74HC563 is an high speed CMOS OCTAL
LATCH WITH 3-STATE OUTPUTS fabricated
with silicon gate C
2
MOS technology.
This 8-BIT D-Type latches is controlled by a latch
enable input (LE) and output enable input (OE
).
While the LE input is held at a high level, the Q
outputs will follow the data input inversely. When
the LE is taken, the Q outputs will be latched
inversely at the logic level of D input data.
While the OE
input is at low level, the eight outputs
will be in a normal logic state (high or low logic
level) and while OE
is in high level the outputs will
be in a high impedance state.
The 3-State output configuration and the wide
choice of outline make bus organized system
simple.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC563
OCTAL D-TYPE LATCH
WITH 3 STATE OUTPUT INVERTING
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE TUBE T & R
DIP M74HC563B1R
SOP M74HC563M1R M74HC563RM13TR
TSSOP M74HC563TTR
TSSOPDIP SOP
Obsolete Product(s) - Obsolete Product(s)
