The MAX4983E/MAX4984E are ideal for routing USB
data lines (see Figure 6) and for applications that
require switching between multiple USB hosts (see
Figure 7). The MAX4983E/MAX4984E also feature
overvoltage fault protection to guard systems against
shorts to the USB VBUS voltage that is required for all
USB applications.
Extended ESD Protection
As with all Maxim devices, ESD-protection structures
are incorporated on all pins to protect against electro-
static discharges encountered during handling and
assembly. COM1 and COM2 are further protected
against static electricity. The ESD structures withstand
high ESD in normal operation and when the device is
powered down. After an ESD event, the MAX4983E/
MAX4984E continue to function without latchup.
The MAX4983E and MAX4984E are characterized for
protection to the following limits:
• ±15kV using Human Body Model
• ±8kV using IEC 61000-4-2 Contact Discharge method
• ±15kV using IEC 61000-4-2 Air-Gap Discharge method
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents
test setup, test methodology, and test results.
Human Body Model
Figure 8a shows the Human Body Model and Figure 8b
shows the current waveform it generates when dis-
charged into a low impedance. This model consists of a
100pF capacitor charged to the ESD voltage of interest,
which is then discharged into the test device through a
1.5kΩ resistor.
IEC 61000-4-2
The main difference between tests done using the Human
Body Model and IEC 61000-4-2 is higher peak current in
IEC 61000-4-2. Because series resistance is lower in the
IEC 61000-4-2 ESD test model (Figure 9a), the ESD-with-
stand voltage measured to this standard is generally
lower than that measured using the Human Body Model.
Figure 9b shows the current waveform for the ±8kV
IEC 61000-4-2 Level 4 ESD Contact Discharge test.
The Air-Gap Discharge test involves approaching the
device with a charged probe. The Contact Discharge
method connects the probe to the device before the
probe is energized.
Layout
USB Hi-Speed requires careful PCB layout with 45Ω
controlled-impedance matched traces of equal lengths.
Ensure that bypass capacitors are as close as possible
to the device. Use large ground planes where possible.
Power-Supply Sequencing
Caution: Do not exceed the absolute maximum rat-
ings because stresses beyond the listed ratings
may cause permanent damage to the device.
Proper power-supply sequencing is recommended for all
devices. Always apply V
CC
before applying analog sig-
nals, especially if the analog signal is not current limited.
Chip Information
PROCESS: BiCMOS
MAX4983E/MAX4984E
Hi-Speed USB 2.0 Switches
with ±15kV ESD
_______________________________________________________________________________________ 9
X = DON'T CARE.
X = DON'T CARE.
