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MM74HC589MX

P1-P3P4-P6P7-P9
© 2001 Fairchild Semiconductor Corporation DS005368 www.fairchildsemi.com
September 1983
Revised September 2001
MM74HC589 8-Bit Shift Registers with Input Latches and 3-STATE Serial Output
MM74HC589
8-Bit Shift Registers
with Input Latches and 3-STATE Serial Output
General Description
The MM74HC589 high speed shift register utilizes
advanced silicon-gate CMOS technology to achieve the
high noise immunity and low power consumption of stan-
dard CMOS integrated circuits, as well as the ability to
drive 15 LS-TTL loads.
The MM74HC589 comes in a 16-pin package and consists
of an 8-bit storage latch feeding a parallel-in, serial-out 8-
bit shift register. Data can also be entered serially the shift
register through the SER pin. Both the storage register and
shift register have positive-edge triggered clocks, RCK and
SCK, respectively. SLOAD
pin controls parallel LOAD or
serial shift operations for the shift register. The shift register
has a 3-STATE output to enable the wire-ORing of multiple
devices on a serial bus.
The 74HC logic family is speed, function, and pin-out com-
patible with the standard 74LS logic family. All inputs are
protected from damage due to static discharge by internal
diode clamps to V
CC
and ground.
Features
■ 8-bit parallel storage register inputs
■ Wide operating voltage range: 2V–6V
■ Shift register has direct overriding load
■ Guaranteed shift frequency. . . DC to 30 MHz
■ Low quiescent current: 80
µA maximum (74HC Series)
■ 3-STATE output for ‘Wire-OR'
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Top View
Truth Table
Order Number Package Number Package Description
MM74HC589M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74HC589SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC589N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
RCK SCK SLOAD OE Function
XX XHQ
H
in Hi-Z State
XX XLQ
H
is enabled
↑ X X X Data loaded into input latches
↑ X L X Data loaded into shift register
from pins
H or L X L X Data loaded from latches to
shift register
X
↑ H X Shift register is shifted. Data
on SER pin is shifted in.
↑↑ H X Data is shifted in shift register,
and data is loaded into latches
www.fairchildsemi.com 2
MM74HC589
Block Diagram (positive logic)
3 www.fairchildsemi.com
MM74HC589
Absolute Maximum Ratings(Note 1)
(Note 2)
Recommended Operating
Conditions
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating — plastic “N” package: −
12 mW/°C from 65°C to 85°C.
DC Electrical Characteristics (Note 4)
Note 4: For a power supply of 5V ±10% the worst case output voltages (V
OH
, and V
OL
) occur for HC at 4.5V. Thus the 4.5V values should be used when
designing with this supply. Worst case V
IH
and V
IL
occur at V
CC
=5.5V and 4.5V respectively. (The V
IH
value at 5.5V is 3.85V.) The worst case leakage current
(I
IN
, I
CC
, and I
OZ
) occur for CMOS at the higher voltage and so the 6.0V values should be used.
Supply Voltage (V
CC
) −0.5 to +7.0V
DC Input Voltage (V
IN
) −1.5 to V
CC
+1.5V
DC Output Voltage (V
OUT
) −0.5 to V
CC
+0.5V
Clamp Diode Current (I
IK
, I
OK
) ±20 mA
DC Output Current, per pin (I
OUT
) ±25 mA
DC V
CC
or GND Current, per pin (I
CC
) ±50 mA
Storage Temperature Range (T
STG
) −65°C to +150°C
Power Dissipation (P
D
)
(Note 3) 600 mW
S.O. Package only 500 mW
Lead Temperature (T
L
)
(Soldering 10 seconds) 260
°C
Min Max Units
Supply Voltage (V
CC
)26V
DC Input or Output Voltage
(V
IN
, V
OUT
)0V
CC
V
Operating Temperature Range (T
A
) −40 +85 °C
Input Rise or Fall Times
(t
r
, t
f
) V
CC
= 2.0V 1000 ns
V
CC
= 4.5V 500 ns
V
CC
= 6.0V 400 ns
Symbol Parameter Conditions
V
CC
T
A
= 25°CT
A
= −40 to 85°CT
A
= −55 to 125°C
Units
Typ Guaranteed Limits
V
IH
Minimum HIGH Level 2.0V 1.5 1.5 1.5 V
Input Voltage 4.5V 3.15 3.15 3.15 V
6.0V 4.2 4.2 4.2 V
V
IL
Maximum LOW Level 2.0V 0.5 0.5 0.5 V
Input Voltage 4.5V 1.35 1.35 1.35 V
6.0V 1.8 1.8 1.8 V
V
OH
Minimum HIGH Level V
IN
= V
IH
or V
IL
Output Voltage |I
OUT
| ≤ 20 µA 2.0V 2.0 1.9 1.9 1.9 V
4.5V 4.5 4.4 4.4 4.4 V
6.0V 6.0 5.9 5.9 5.9 V
V
IN
= V
IH
or V
IL
|I
OUT
| ≤ 6.0 mA 4.5V 3.98 3.84 3.7 V
|I
OUT
| ≤ 7.8 mA 6.0V 5.48 5.34 5.2 V
V
OL
Maximum LOW Level V
IN
= V
IH
or V
IL
Output Voltage |I
OUT
| ≤ 20 µA 2.0V 0 0.1 0.1 0.1 V
4.5V 0 0.1 0.1 0.1 V
6.0V 0 0.1 0.1 0.1 V
V
IN
= V
IH
or V
IL
|I
OUT
| ≤ 6.0 mA 4.5V 0.26 0.33 0.4 V
|I
OUT
| ≤ 7.8 mA 6.0V 0.26 0.33 0.4 V
I
IN
Maximum Input V
IN
= V
CC
or GND 6.0V ±0.1 ±1.0 ±1.0 µA
Current
I
CC
Maximum Quiescent V
IN
= V
CC
or GND 6.0V 8.0 80 160 µA
Supply Current I
OUT
= 0 µA
I
OZ
Maximum 3-STATE Output in High 6.0V ±0.5 ±5.0 ±10.0 µA
Leakage Current Impedance State
V
IN
= V
IL
or V
IH
V
OUT
= V
CC
or GND
OE = V
IH
P1-P3P4-P6P7-P9

MM74HC589MX

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Manufacturer:
ON Semiconductor / Fairchild
Description:
Counter Shift Registers 8-Bit Shift Register
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