MAX9949/MAX9950
Dual Per-Pin Parametric Measurement Units
_______________________________________________________________________________________ 7
AC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +12V, V
EE
= -7V, V
L
= +3.3V, C
CM
= 120pF, C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless otherwise noted. T
A
< +25°C guaranteed
by design and characterization. Typical values are at T
A
= +25°C, unless otherwise specified.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DISABLE True (0) to High-Z
C
LCOMP
= 20pF, measured from 50% of
digital input voltage to 10% of output
voltage
300 ns
DISABLE False (1) to Active
C
LCOMP
= 20pF, measured from 50% of
digital input voltage to 90% of output
voltage
100 ns
SERIAL PORT (V
L
= +3.0V, C
DOUT
= 10pF)
Serial Clock Frequency f
SCLK
20 MHz
SCLK Pulse-Width High t
CH
12 ns
SCLK Pulse-Width Low t
CL
12 ns
SCLK Fall to DOUT Valid t
DO
22 ns
CS Low to SCLK High Setup t
CSS0
10 ns
SCLK High to CS High Hold t
CSH1
22 ns
SCLK High to CS Low Hold t
CSH0
0ns
CS High to SCLK High Setup t
CSS1
5ns
DIN to SCLK High Setup t
DS
10 ns
DIN to SCLK High Hold t
DH
(Note 14) 0 ns
CS Pulse-Width High t
CSWH
10 ns
CS Pulse-Width Low t
CSWL
10 ns
LOAD Pulse-Width Low t
LDW
20 ns
V
DD
High to CS Low (Power-Up) (Note 14) 500 µs
Note 2: The device operates properly with different supply voltages with equally different voltage swings.
Note 3: Tested at V
CC
= +18V and V
EE
= -12V.
Note 4: Interpret errors expressed in terms of %FSR (percent of full-scale range) as a percentage of the end-point to end-point
range, i.e., for the ±25mA range, the full-scale range = 50mA and a 1% error = 500µA.
Note 5: Case must be maintained ±5°C for linearity specifications.
Note 6: Current linearity specifications are maintained to within 700mV of the clamp voltages when the clamps are enabled.
Note 7: Tested in range C.
Note 8: Linearity of the measured output is only guaranteed within the specified current range.
Note 9: The digital interface accepts +5V, +3.3V, and +2.5V CMOS logic levels. The voltage at V
L
adjusts the threshold.
Note 10: Settling times are to 0.1% of FSR. Cx = 47pF.
Note 11: All settling times are specified using a single compensation capacitor (Cx) across all current-sense resistors. Use an indi-
vidual capacitor across each sense resistor for better performance across all current ranges, particularly the lower ranges.
Note 12: The actual settling time of the measured voltage path (SENSE_ input to MSR_ output) is less than 1µs. However, the R-C
time constant of the sense resistor and the load capacitance causes a longer overall settling time of the DUT voltage. This
settling time is a function of the current-range resistor used.
Note 13: The propagation delay time is only guaranteed over the force-voltage output range. Propagation delay is measured by
holding the SENSE_ input voltage steady and transitioning THMAX_ or THMIN_.
Note 14: Guaranteed by design.
MAX9949/MAX9950
Dual Per-Pin Parametric Measurement Units
8 _______________________________________________________________________________________
Typical Operating Characteristics
(V
CC
= +12V, V
EE
= -7V, C
L
= 100pF, R
L
to +2.5V, range A: R_A = 80, R
L
= 180; range B: R_B = 1k, R
L
= 2.25k; range C: R_C =
10k, R
L
= 22.5k; range D: R_D = 100k, R
L
= 225k; range E: R_E = 1M, R
L
= 2.25M, T
A
= +25°C.
TRANSIENT RESPONSE FVMI MODE
RANGES A, B, C
MAX9949/50 toc01
20µs/div
IN_
5V/div
0
0
FORCE
_
5V/div
TRANSIENT RESPONSE FVMI MODE
RANGE D
MAX9949/50 toc02
100µs/div
IN_
5V/div
FORCE
_
5V/div
0
0
TRANSIENT RESPONSE FVMI MODE
RANGE E
MAX9949/50 toc03
1.0ms/div
IN_
5V/div
FORCE
_
5V/div
0
0
TRANSIENT RESPONSE FVMV MODE
RANGE C
MAX9949/50 toc04
20µs/div
IN_
5V/div
MSR_
5V/div
0
0
TRANSIENT RESPONSE FIMI MODE
RANGES A, B, C
MAX9949/50 toc05
20µs/div
IN_
5V/div
FORCE
_
5V/div
0
0
TRANSIENT RESPONSE FIMI MODE
RANGE D
MAX9949/50 toc06
100µs/div
IN_
5V/div
FORCE
5V/div
0
0
TRANSIENT RESPONSE FIMI MODE
RANGE E
MAX9949/50 toc07
1.0ms/div
IN_
5V/div
FORCE
5V/div
0
0
IOS vs. POWER SUPPLIES
MAX9949/50 toc08
VOLTAGE (V)
20
-15
-10
-5
0
5
10
15
3.2 1.8
-0.2
-7
4.4
11.2
V
EE
V
CC
IOS (MAX)
IOS (MIN)
MAX9949/MAX9950
Dual Per-Pin Parametric Measurement Units
_______________________________________________________________________________________ 9
PIN
MAX9950 MAX9949
NAME FUNCTION
1, 16,
33, 48
1, 16,
33, 48
V
EE
Negative Analog Supply Input
2, 15,
34, 47
2, 15,
34, 47
V
CC
Positive Analog Supply Input
3 14 RBCOM
PMU-B Range-Setting-Resistor Common Connection. Connect to one end of all the range-
setting resistors (RB_) for PMU-B. Also serves as the input to an external current-range buffer
for PMU-B.
4 13 RBE PMU-B Range E Resistor Connection
5 12 RBD PMU-B Range D Resistor Connection
6 11 RBC PMU-B Range C Resistor Connection
7 10 RBB PMU-B Range B Resistor Connection
8 9 RBA PMU-B Range A Resistor Connection
9 8 FORCEB PMU-B Driver Output. Forces a current or voltage to the DUT for PMU-B.
10 7 SENSEB
PMU-B Sense Input. A Kelvin connection to the DUT. Provides the feedback signal in FVMI
mode and the measured signal in FIMV mode for PMU-B.
11 6 CC1B
PMU-B Compensation Capacitor Connection 1. Provides compensation for the PMU-B main
amplifier.
12 5 CC2B
PMU-B Compensation Capacitor Connection 2. Provides compensation for the PMU-B main
amplifier.
13 4 RXDB
PMU-B Current-Range Sense-Resistor Connection. Connects to the external current-range
sense resistor on the DUT side for PMU-B. See Figure 5.
14 3 RXAB
PMU-B Current-Range Sense-Resistor Connection. Connects to the external current-range
sense resistor on the amplifier side for PMU-B. See Figure 5.
17 64 CS Chip-Select Input. Force CS low to enable communication with the serial port.
18 63 LOAD
Serial Port Load Input. A logic low asynchronously loads data from the input registers into the
PMU registers.
19 62 SCLK Serial Clock Input
20 61 DIN Serial Data Input
21 60 DUTHB
PMU-B Window-Comparator High-Comparator Output. A sense-B voltage above the V
THMAXB
level forces the DUTHB output low. DUTHB is an open-drain output.
22 59 DUTLB
PMU-B Window-Comparator Low-Comparator Output. A sense-B voltage below the V
THMINB
level forces the DUTLB output low. DUTLB is an open-drain output.
23 58 EXTBSEL PMU-B External Current-Range Selector. Selects the external current range for PMU-B.
24, 27 54, 57 DGND Digital Ground
25 56 DOUT
Serial Data Output. Provides data out from the shift register. Facilitates daisy-chaining to DIN
of a downstream PMU.
26 55 V
L
Logic Supply Voltage Input. The voltage applied at VL
sets the upper logic-voltage level.
28 53 EXTASEL PMU-A External Current-Range Selector. Selects the external current range for PMU-A.
29 52 DUTLA
PMU-A Window-Comparator Low-Comparator Output. A sense-A voltage below the V
THMINA
level forces the DUTLA output low. DUTLA is an open-drain output.
Pin Description

MAX9949DCCB+D

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Lifecycle:
New from this manufacturer.
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