www.irf.com 1
03/09/05
IRF6601/IRF6601TR1
Notes through are on page 11
l Application Specific MOSFETs
l Ideal for CPU Core DC-DC Converters
l Low Conduction Losses
l Low Switching Losses
l Low Profile (<0.7 mm)
l Dual Sided Cooling Compatible
l Compatible with exisiting Surface Mount
Techniques
The IRF6601 combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFET
TM
packaging to
achieve the lowest on-state resistance in a package that has the footprint of an SO-8 and only 0.7 mm profile. The DirectFET
package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase,
infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods
and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, IM-
PROVING previous best thermal resistance by 80%.
The IRF6601 balances both low resistance and low charge along with ultra low package inductance to reduce both conduction
and switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the
latest generation of processors operating at higher frequencies. The IRF6601 has been optimized for parameters that are
critical in synchronous buck converters including Rds(on), gate charge and Cdv/dt-induced turn on immunity. The IRF6601
offers particularly low Rds(on) and high Cdv/dt immunity for synchronous FET applications.
Description
HEXFET
®
Power MOSFET
DirectFET ISOMETRIC
V
DSS
R
DS(on)
max
Qg
20V
3.8m
Ω
@V
GS
= 10V
30nC
5.0m
Ω
@V
GS
= 4.5V
Absolute Maximum Ratings
Parameter Units
V
DS
Drain-to-Source Voltage V
V
GS
Gate-to-Source Voltage
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V
I
D
@ T
A
= 25°C
Continuous Drain Current, V
GS
@ 10V
A
I
D
@ T
A
= 70°C
Continuous Drain Current, V
GS
@ 10V
I
DM
Pulsed Drain Current
P
D
@T
A
= 25°C
Power Dissipation
P
D
@T
A
= 70°C
Power Dissipation
W
P
D
@T
C
= 25°C
Power Dissipation
Linear Derating Factor W/°C
T
J
Operating Junction and °C
T
STG
Storage Temperature Range
Thermal Resistance
Parameter Typ. Max. Units
R
θJA
Junction-to-Ambient
––– 35
R
θJA
Junction-to-Ambient
12.5 –––
R
θJA
Junction-to-Ambient
20 ––– °C/W
R
θJC
Junction-to-Case
––– 3.0
R
θJ-PCB
Junction-to-PCB Mounted 1.0 –––
Max.
26
20
200
±20
20
85
-40 to + 150
3.6
0.029
2.3
42
Applicable DirectFET Package/Layout Pad (see p.9, 10 for details)
SQ SX ST MQ MX
MT
MT
PD - 94366F
