MC74HCT138AD

MC74HCT138A
http://onsemi.com
4
AC ELECTRICAL CHARACTERISTICS (V
CC
= 5.0 V ± 10%, C
L
= 50 pF, Input t
r
= t
f
= 6.0 ns)
Symbo
l
Parameter
Guaranteed Limit
Unit
– 55 to
25_C
v 85_C v 125_C
t
PLH
,
t
PHL
Maximum Propagation Delay, Input A to Output Y
(Figures 1 and 4)
30 38 45 ns
t
PLH
,
t
PHL
Maximum Propagation Delay, CS1 to Output Y
(Figures 2 and 4)
27 34 41 ns
t
PLH
,
t
PHL
Maximum Output Transition Time, CS2 or CS3 to Output Y
(Figures 3 and 4)
30 38 45 ns
t
TLH
,
t
THL
Maximum Output Transition Time, Any Output
(Figures 2 and 4)
15 19 22 ns
t
r
, t
f
Maximum Input Rise and Fall Time 500 500 500 ns
C
in
Maximum Input Capacitance 10 10 10 pF
NOTE:For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON
Semiconductor High−Speed CMOS Data Book (DL129/D).
C
PD
Power Dissipation Capacitance (Per Enabled Output)*
Typical @ 25°C, V
CC
= 5.0 V
pF
51
* Used to determine the no−load dynamic power consumption: P
D
= C
PD
V
CC
2
f + I
CC
V
CC
. For load considerations, see Chapter 2 of the
ON Semiconductor High−Speed CMOS Data Book (DL129/D).
EXPANDED LOGIC DIAGRAM
A0
A1
A2
CS3
CS2
CS1
1
2
3
4
5
6
15
14
13
12
11
10
9
7
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y0
MC74HCT138A
http://onsemi.com
5
SWITCHING WAVEFORMS
Figure 1.
1.3 V
t
PHL
t
PLH
t
THL
t
TLH
3 V
GND
Figure 2.
VALID
OUTPUT Y
1.3 V
3 V
GND
t
f
t
f
t
PHL
t
PLH
OUTPUT Y
INPUT
CS2, CS3
90%
1.3 V
10%
t
r
3 V
GND
t
PLH
t
TLH
90%
10%
OUTPUT Y
INPUT CS1
t
PHL
2.7 V
1.3 V
0.3 V
t
THL
INPUT A
Figure 3.
t
r
*Includes all probe and jig capacitance
Figure 4.
C
L
*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
VALID
1.3 V
2.7 V
1.3 V
0.3 V
TEST CIRCUIT
MC74HCT138A
http://onsemi.com
6
PACKAGE DIMENSIONS
PDIP−16
N SUFFIX
CASE 648−08
ISSUE T
SOIC−16
D SUFFIX
CASE 751B−05
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
−A−
B
F
C
S
H
G
D
J
L
M
16 PL
SEATING
18
916
K
PLANE
−T−
M
A
M
0.25 (0.010) T
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
C 0.145 0.175 3.69 4.44
D 0.015 0.021 0.39 0.53
F 0.040 0.70 1.02 1.77
G 0.100 BSC 2.54 BSC
H 0.050 BSC 1.27 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.130 2.80 3.30
L 0.295 0.305 7.50 7.74
M 0 10 0 10
S 0.020 0.040 0.51 1.01
____
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
18
16 9
SEATING
PLANE
F
J
M
R X 45
_
G
8 PLP
−B−
−A−
M
0.25 (0.010) B
S
−T−
D
K
C
16 PL
S
B
M
0.25 (0.010) A
S
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 9.80 10.00 0.386 0.393
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC 0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0 7 0 7
P 5.80 6.20 0.229 0.244
R 0.25 0.50 0.010 0.019
____

MC74HCT138AD

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC DECODER/DMUX 1-8 LSTTL 16SOIC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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