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LT1619EMS8#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
7
LT1619
1619fa
OPERATIO
U
Inductor
The value of the inductor is usually selected so that the
peak-to-peak ripple current is less than 30% of the maxi-
mum inductor current. The inductor should be able to
handle the maximum inductor current at full load without
saturation. Powder iron cores are not suitable for high
frequency switch mode power supply applications be-
cause of their high core losses. Ferrite cores have very low
core losses and are the material of choice for high fre-
quency DC/DC converters.
Power MOSFET Driver
The LT1619 is capable of driving a low side N-channel
power MOSFET with up to 60nC of total gate charge (Q
g
).
An external driver is recommended for MOSFETs with
greater than 80nC of total gate charge. The peak gate drive
current varies from 0.5A with V
DRV
= 2.5V to 1.2A with
V
DRV
= 10V. The MOSFET driver is capable of charging the
gate of the power MOSFET to within 350mV of the upper
gate drive supply rail (DRV). It can also pull the gate of the
MOSFET to within 100mV of ground during turnoff. The
upper supply rail of the gate drive is brought out as a device
pin (DRV) for design flexibility. In a boost converter
design, the DRV pin can be tied to the converter output if
the minimum input voltage is insufficient to fully enhance
the power MOSFET. During start-up, the MOSFET is driven
with a gate voltage starting from V
IN
– V
D
(V
D
is the
forward voltage of the rectifying diode). As the output
voltage rises, the gate drive also increases until steady
state is reached. If the steady-state converter output
voltage exceeds the maximum allowable gate source
voltage and the input voltage is sufficient to enhance the
MOSFET, the DRV pin is tied to the input supply. For a
SEPIC converter, the DRV pin can be tied to the input or
diode OR’ed from the input and the output (Figure 4).
Figure 4. SEPIC Converter with Diode OR’ed Gate Drive Supply
or less than the number specified in Table 1 are accept-
able. The maximum duty cycle is essentially unaffected by
synchronization.
The device will go into shutdown mode if the S/S pin
voltage stays below the shutdown threshold of 0.45V for
more than 33µs. This shutdown delay is reset whenever
the S/S pin voltage rises above the shutdown threshold.
Applying a logic low signal at the S/S pin causes the gate
drive output to go low. Although all circuits in the LT1619
are disabled, the pull-down circuit in the MOSFET buffer is
still biased on. It is capable of shunting any leakage or
transient current at the GATE pin to ground, eliminating
the need for an external bleed resistor. The LT1619 con-
sumes 15µA in shutdown.
The LT1619 is guaranteed to start with a minimum V
IN
of
1.85V. Comparator A2 senses the input voltage and gen-
erates an undervoltage lockout (UVLO) signal if V
IN
falls
below this minimum. While in undervoltage lockout, V
C
is
pulled low and the LT1619 stops switching. The supply
current drawn by the device falls to 140µA.
Table 1. Maximum Allowable Rise Time of Synchronization
Pulse. Rise Time Can Be Slower if Clock Amplitude is Higher
SYNCHRONIZATION MAXIMUM ALLOWABLE
AMPLITUDE (V) RISE TIME (ns)
1.2 120
1.5 220
2.0 350
2.5 470
3.0 530
DRV
V
IN
V
OUT
R
S
1619 F03
LT1619
GND
•
•
+
+
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LT1619
1619fa
Power MOSFET
MOSFET power dissipation can be separated into fre-
quency independent and frequency dependent compo-
nents. The R
DS(ON)
loss in the switch is the product of the
mean square switch current and switch R
DS(ON)
and it
does not vary with the operating frequency.
The frequency-dependent switching losses consist of 1)
switch transition loss due to finite rise and fall times of the
drain source voltage and the drain current 2) gate switch-
ing loss, i.e., a packet of charge Q
g
(the total gate charge)
which is moved from the gate drive power supply to
ground in every switch cycle, and 3) the drain switching
loss, charge stored on the parasitic drain capacitance,
C
OSS
is dumped to ground as the switch is turned on. The
transistor loss can be expressed as:
P
LOSS
= I
DRMS
2
R
DS(ON)
+ transition loss + Q
g
V
G
f
S
+ 1/2C
OSS
V
DS(OFF)
2
f
S
where the transition loss can be estimated with:
TransitionLoss I
CV f
I
D
RSS DS OFF S
G AVG
=
()
()
2
Q
g
= The total gate charge
V
G
= Gate drive voltage ≈ V
DRV
I
G(AVG)
= The average MOSFET buffer output current
f
S
= Operating frequency
C
RSS
= The average C
GD
between V
DS
= 0V
and V
DS
= V
DS(OFF)
At low V
DS(OFF)
(≤12V) and operating frequencies below
500kHz, the ohmic losses often dominate. For high voltage
converters, the transition loss and C
OSS
charge dumping
loss can dramatically impact the converter efficiency.
MOSFETs with lower parasitic capacitances but higher
R
DS(ON)
may actually provide better efficiency in these
situations.
Capacitors
In a switch mode DC/DC converter, output ripple voltage
is the product of the equivalent series resistance (ESR) of
the output capacitor and the peak-to-peak capacitor
current. Depending on topology, current feeding the out-
put capacitor can be continuous or discontinuous. The input
current can also be continuous or discontinuous even if the
inductor current itself is continuous. In boost topology, the
inductor is in series with the input source so the input
current is continuous and the output current is discontinu-
ous. In buck-boost or flyback converters, the inductor is
not in series with the input source nor the output, so nei-
ther the input current nor output current is continuous.
Whenever a terminal current is discontinuous, the capaci-
tor at that terminal should be chosen to handle the ripple
current. Capacitor reliability will be adversely affected if
the ripple current exceeds the maximum allowable rat-
ings. This maximum rating is specified as the RMS ripple
current. Several capacitors may be mounted in parallel to
meet the size and ripple current requirements.
Besides the ripple voltage requirements, the output ca-
pacitor also needs to be sized for acceptable output
voltage variation under load transients.
Current Sensing Resistor R
SENSE
The LT1619 drives a low side N-channel MOSFET switch.
The switch current is sensed with an external resistor
R
SENSE
connected between the source of the MOSFET and
ground. The internal blanking circuit blocks the voltage
spike developed across R
SENSE
for 280ns at switch turn-
on. The switch is turned off when the instantaneous
voltage across R
SENSE
exceeds the current limit threshold,
V
SENSE
. Allowing variations in V
SENSE
yields:
R
V
I
SENSE
SENSE MIN
LMAX
=
()
()
The current limit threshold is constant and does not vary
with duty ratio.
Due to low signal level of the sense voltage, low inductance
sense resistors are required to reduce switching noise.
Low TC resistors maintain constant current limit over
temperature. Dale WSL and IRC series sense resistors
meet these criteria.
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LT1619
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Diode
Schottky diodes are recommended for low output voltage
applications because of their low forward voltage. Since
Schottky diodes have negligible stored charge, charge
dumping loss is also reduced. The reverse breakdown
voltage of the diode should exceed the maximum reverse
voltage stress of the topology used. The diode should also
be able to carry the peak diode current with acceptable
foward voltage. For the boost converter in Figure 1, the
peak inductor current is approximately 5A. A Motorola
MBRD835 is used due to its low forward voltage.
Lowering Burst Mode Operation Current Limit
The LT1619 automatically enters Burst Mode operation as
V
C
voltage falls below V
B
. The corresponding switch
current is the Burst Mode operation switch current thresh-
old, I
D(BURST)
.
The effective Burst Mode operation current threshold can
be lowered by adding an offset to the input of the current
sense amplifier so that the switch current appears higher
to the PWM comparator. This has the effect of shifting the
V
C
operating range above V
B
. Although Burst Mode opera-
tion is not entirely disabled, the peak switch current before
entering Burst Mode operation is greatly reduced due to
the offset of the current sense amplifier. The peak switch
current is also determined by the current sense amplifier
blanking.
To lower the Burst Mode operation current sense thresh-
old, a resistor R
OS
is added between the SENSE pin and
the sense resistor R
SENSE
(Figure 5). The input bias
current I
BIAS
of the current sense amplifier, which has a
tolerance of ±25% and is temperature stable, develops an
offset voltage at the sense input. The value of R
OS
required
for non-Burst Mode operation can be obtained with the
expression:
I
BIAS
R
OS
≥ V
SENSE(BURST)
where
V
SENSE(BURST)
= (Burst Mode operation peak switch
current, I
D(BURST)
) • R
SENSE
For example, if I
BIAS
= 120µA and V
SENSE(BURST)
= 10mV:
R
mV
A
OS
≥
µ
=Ω
10
120
83
Allowing for 25% and 30% variations in I
BAIS
and
V
SENSE(BURST)
respectively:
R
OS
= (1.25)(1.3)(83Ω)
Choose R
OS
= 137Ω to completely disable Burst Mode
operation. Lower values of R
OS
(for example, 50Ω to
100Ω) can be used to lower the effective Burst Mode
current limit.
The value of the sense resistor is then adjusted to compen-
sate for the reduced full-scale sense voltage.
I
BIAS
R
OS
+ I
L(MAX)
R
SENSE
= 40mV
Filtering Current Sense Signal
I
n a current mode converter, the current sense circuit
senses the switch current and terminates the switch
conduction. In the LT1619, the current sense amplifier
has a full-scale input voltage range from the ground to the
current limit threshold (53mV). Due to high speed switch-
ing transients and parasitic trace inductances, the current
sense signal V
SENSE
tends to be noisy. If the V
SENSE
switching transient is excessive, the current sense ampli-
fier will amplify the spurious transient instead, resulting in
jittery operation. In situations where the internal leading
edge blanking is inadequate, a lowpass filter (Figure 6)
with corner frequency about 5 times the switching
fre
quency can be used to further attenuate high speed
switching transients. In Figure 6 the lowpass filter R
OS
and
C
S
has a corner frequency of:
Figure 5. Lowering Burst Mode Operation Current Limit
–
+
5
4
GND
SENSE
R
SENSE
R
OS
CURRENT
SENSE
AMPLIFIER
I
BIAS
= 120µA
1619 F05
I
D
I
BIAS
= 120µA
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LT1619EMS8#PBF

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Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Current-Mode Boost Controller
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