13©2017 Integrated Device Technology, Inc December 18, 2017
5X2503 Datasheet
1
A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the V
IH(MIN)
of the SCL signal) to bridge the undefined region
of the falling edge of SCL.
Spread Spectrum Generation Specifications
Table 19. I
2
C Bus AC Characteristics
Symbol Parameter Minimum Typical Maximum Units
F
SCLK
Serial Clock Frequency (SCL) — 100 400 kHz
t
BUF
Bus Free Time between STOP and START 1.3 — — μs
t
SU:START
Setup Time, START 0.6 — — μs
t
HD:START
Hold Time, START 0.6 — — μs
t
SU:DATA
Setup Time, data input (SDA) 100 — — ns
t
HD:DATA
Hold Time, data input (SDA)
1
0——μs
t
OVD
Output Data Valid from Clock — — 0.9 μs
C
B
Capacitive Load for Each Bus Line — — 400 pF
t
R
Rise Time, data and clock (SDA, SCL) 20 + 0.1 × C
B
— 300 ns
t
F
Fall Time, data and clock (SDA, SCL) 20 + 0.1 × C
B
— 300 ns
t
HIGH
High Time, clock (SCL) 0.6 — — μs
t
LOW
Low Time, clock (SCL) 1.3 — — μs
t
SU:STOP
Setup Time, STOP 0.6 — — μs
Table 20. Spread Spectrum Generation Specifications
Symbol Parameter Description Minimum Typical Maximum Units
f
OUT
Output Frequency Output frequency range. 1 — 125 MHz
f
MOD
Mod Frequency Modulation frequency. 30 to 63 kHz
f
SPREAD
Spread Value Amount of spread value
(programmable)–down spread.
-0.5% to -2% % f
OUT
%tolerance Spread% Value Variation of spread range. — 15 — %
