11
LTC4006
4006fa
OPERATIO
U
This voltage is stored by C7. Then the switch is opened for a
short period of time to read the voltage across the thermistor.
t
HOLD
= 10 • R
RT
• 17.5pF = 54µs,
for R
RT
= 309k
When the t
HOLD
interval ends the result of the thermistor
testing is stored in the D flip-flop (DFF). If the voltage at
NTC is within the limits provided by the resistor divider
feeding the comparators, then the NOR gate output will be
low and the DFF will set T
BAD
to zero and charging will
continue. If the voltage at NTC is outside of the resistor
divider limits, then the DFF will set T
BAD
to one, the charger
will be shut down, and the timer will be suspended until
T
BAD
returns to zero (see Figure 4).
be inhibited if it is not already active. If the charging current
decreases below 10% to 15% of programmed current,
while engaged in input current limiting, BGATE will be
forced low to prevent the charger from discharging the
battery. Audible noise can occur in this mode of operation.
An overvoltage comparator guards against voltage tran-
sient overshoots (>7% of programmed value). In this
case, both MOSFETs are turned off until the overvoltage
condition is cleared. This feature is useful for batteries
which “load dump” themselves by opening their protec-
tion switch to perform functions such as calibration or
pulse mode charging.
As the voltage at BAT increases to near the input voltage
at DCIN, the converter will attempt to turn on the top
MOSFET continuously (“dropout’’). A watchdog timer
detects this condition and forces the top MOSFET to turn
off for about 300ns at 40µs intervals. This is done to
prevent audible noise when using ceramic capacitors at
the input and output.
Charger Startup
When the charger is enabled, it will not begin switching
until the I
TH
voltage exceeds a threshold that assures initial
current will be positive. This threshold is 5% to 15% of the
maximum programmed current. After the charger begins
switching, the various loops will control the current at a
level that is higher or lower than the initial current. The
duration of this transient condition depends upon the loop
compensation but is typically less than 100µs.
Thermistor Detection
The thermistor detection circuit is shown in Figure 3. It requires
an external resistor and capacitor in order to function properly.
The thermistor detector performs a sample-and-hold func-
tion. An internal clock, whose frequency is determined by
the timing resistor connected to R
T
, keeps switch S1
closed to sample the thermistor:
t
SAMPLE
= 127.5 • 20 • R
RT
• 17.5pF = 13.8ms,
for R
RT
= 309k
The external RC network is driven to approximately 4.5V
and settles to a final value across the thermistor of:
V
VR
RR
RTH FINAL
TH
TH
()
.•
=
+
45
9
6
NTC
LTC4006
S1
R9
32.4k
C7
0.47µF
R
TH
10k
NTC
–
+
–
+
–
+
60k
~4.5V
CLK
45k
15k
T
BAD
4006 F03
D
C
Q
Figure 3
CLK
(NOT TO
SCALE)
V
NTC
t
SAMPLE
VOLTAGE ACROSS THERMISTOR
t
HOLD
4006 F04
COMPARATOR HIGH LIMIT
COMPARATOR LOW LIMIT
Figure 4
