6 Interfaces
6.1 Powering the evaluation board
The board can be powered either through a USB connector J10 or using a laboratory power supply through
pin header J4. LDO TPS79933DDCT is used to regulate 3.3V supply voltage for the module (VREG_IN and
VDD_PADS). Maximum input voltage for the regulator is 6.5V. Enable pins of the internal regulators of the
module (VREG_ENA) are tight to 3.3V supply through zero ohm resistor R1.
6.2 UART
UART interface of the module is available in the pin header J3. When UART is being used through the pin
header the RS232 transceiver U2 should be switched to high impedance using SW11. When using RS232
through J5 the transceiver should be enabled with SW11. The maximum baud rate of the transceiver in the
evaluation board is 235kbps.
6.3 Host selection DIP switch
DIP switch SW1 is used for the host selection as described below.
The MCU of WT21 selects the UART/SDIO interfaces by reading PIO[4] at boot-time. When PIO[4] is high, the
SDIO interface is enabled; when PIO[4] is low, the UART is enabled.
If in UART mode, the MCU selects the UART transfer protocol automatically using the unused SDIO pins
shown in Table 1.
Table 1: SDIO_CLK and SDIO_CMD transfer Protocols
6.3.1 UART protocol selection
At bootup the module looks at PIO4 to determine whether it should use UART or SDIO/CSPI. If PIO4 is pulled
low then UART will be used. It then checks SDIO_CLK and SDIO_CMD pins to determine which mode it
should use for receiving initial pskeys over UART.
Note:
When the switch on the eval board is conducting (marked by "on") then the pin is pulled low which is marked by 0.
To use the H4 UART protocol for configuring the WT21 the PIO4 should be pulled low, the SDIO_CLK should
be pulled low and SDIO_CMD must be pulled high. Note that by default there is a weak pull-up for these pins
so if nothing is connected to them, they will be pulled high.
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