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MP6901DS-LF

P1-P3P4-P6P7-P9P10-P12
MP6901- FAST TURN-OFF INTELLIGENT CONTROLLER
MP6901 Rev. 1.05 www.MonolithicPower.com 7
3/15/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
BLOCK DIAGRAM
Figure 1—Functional Block Diagram
OPERATION
The MP6901 supports operation in CCM, DCM
and Quasi-Resonant topologies. Operating in
either a DCM or Quasi-Resonant topology, the
control circuitry controls the gate in forward mode
and will turn the gate off when the MOSFET
current is fairly low. In CCM operation, the control
circuitry turns off the gate when very fast
transients occur.
Blanking
The control circuitry contains a blanking function.
When it pulls the MOSFET on/off, it makes sure
that the on/off state at least lasts for some time.
The turn on blanking time is ~1.6us, which
determines the minimum on-time. During the turn
on blanking period, the turn off threshold is not
totally blanked, but changes the threshold
voltage to ~+50mV (instead of -30mV). This
assures that the part can always be turned off
even during the turn on blanking period. (Albeit
slower, so it is not recommended to set the
synchronous period less than 1.6us at CCM
condition in flyback converter, otherwise shoot
through may occur)
VD Clamp
Because V
D
can go as high as 180V, a High-
Voltage JFET is used at the input. To avoid
excessive currents when Vg goes below -0.7V, a
small resistor is recommended between V
D
and
the drain of the external MOSFET.
Under-Voltage Lockout (UVLO)
When the VDD is below UVLO threshold, the part
is in sleep mode and the Vg pin is pulled low by a
10kΩ resistor.
Enable pin
The Enable function is only available on the
SOIC-8 package. If EN is pulled low, the part is in
sleep mode.
Thermal shutdown
If the junction temperature of the chip exceeds
170
o
C, the Vg will be pulled low and the part
stops switching. The part will return to normal
MP6901- FAST TURN-OFF INTELLIGENT CONTROLLER
MP6901 Rev. 1.05 www.MonolithicPower.com 8
3/15/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
function after the junction temperature has
dropped to 120
o
C.
Thermal Design
If the dissipation of the chip is higher than
100mW due to switching frequencies above
100kHz, VDD higher than 15V and/or Cload
larger than 5nF, it is recommended to use the
thermally-enhanced SOIC-8.
Turn-on Phase
When the synchronous MOSFET is conducting,
current will flow through its body diode which
generates a negative Vds across it. Because this
body diode voltage drop (<-500mV) is much
smaller than the turn on threshold of the control
circuitry (-70mV), which will then pull the gate
driver voltage high to turn on the synchronous
MOSFET after about 150ns turn on delay
(Defined in Fig.2).
As soon as the turn on threshold (-70mV) is
triggered, a blanking time (Minimum on-time:
~1.6us) will be added during which the turn off
threshold will be changed from -30mV to +50mV.
This blanking time can help to avoid error trigger
on turn off threshold caused by the turn on
ringing of the synchronous MOSFET.
V
DS
V
GATE
t
Don
t
Doff
-70mV
-30mV
2V
Figure 2—Turn on and Turn off delay
Conducting Phase
When the synchronous MOSFET is turned on,
Vds becomes to rise according to its on
resistance, as soon as Vds rises above the turn
on threshold (-70mV), the control circuitry stops
pulling up the gate driver which leads the gate
voltage is pulled down by the internal pull-down
resistance (10kΩ) to larger the on resistance of
synchronous MOSFET to ease the rise of Vds.
By doing that, Vds is adjusted to be around -
70mV even when the current through the MOS is
fairly small, this function can make the driver
voltage fairly low when the synchronous
MOSFET is turned off to fast the turn off speed
(this function is still active during turn on blanking
time which means the gate driver could still be
turned off even with very small duty of the
synchronous MOSFET).
Turn-off Phase
When Vds rises to trigger the turn off threshold (-
30mV), the gate voltage is pulled to low after
about 20ns turn off delay (defined in Fig.2) by the
control circuitry. Similar with turn-on phase, a
200ns blanking time is added after the
synchronous MOSFET is turned off to avoid error
trigger.
Fig.3 shows synchronous rectification operation
at heavy load condition. Due to the high current,
the gate driver will be saturated at first. After Vds
goes to above -70mV, gate driver voltage
decreases to adjust the Vds to typical -70mV.
Fig.4 shows synchronous rectification operation
at light load condition. Due to the low current, the
gate driver voltage never saturates but begins to
decrease as soon as the synchronous MOSFET
is turned on and adjust the Vds.
-70mV
-30mV
Vds
Isd
Vgs
t 0 t1 t2
Figure 3—Synchronous Rectification
Operation at heavy load
MP6901- FAST TURN-OFF INTELLIGENT CONTROLLER
MP6901 Rev. 1.05 www.MonolithicPower.com 9
3/15/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
-70mV
-30mV
Vds
Isd
Vgs
t0 t1 t2
Figure 4—Synchronous Rectification
Operation at light load
SR Mosfet Selection and Driver ability
The Power Mosfet selection proved to be a trade
off between Ron and Qg. In order to achieve high
efficiency, the Mosfet with smaller Ron is always
preferred, while the Qg is usually larger with
smaller Ron, which makes the turn-on/off speed
lower and lead to larger power loss. For MP6901,
because Vds is regulated at ~-70mV during the
driving period, the Mosfet with too small Ron is
not recommend, because the gate driver may be
pulled down to a fairly low level with too small
Ron when the Mosfet current is still fairly high,
which make the advantage of the low Ron
inconspicuous.
Fig.5 shows the typical waveform of QR flyback.
Assume 50% duty cycle and the output current is
I
OUT
.
To achieve fairly high usage of the Mosfet’s Ron,
it is expected that the Mosfet be fully turned on at
least 50% of the SR conduction period:
OUT
Vds Ic Ron 2 I Ron Vfwd=− × =− ⋅ × ≤−
Where V
ds
is Drain-Source voltage of the Mosfet
and V
fwd
is the forward voltage threshold of
MP6902, which is ~70mV.
So the Mosfet’s Ron is recommended to be no
lower than ~35/I
OUT
(mΩ). (For example, for 5A
application, the Ron of the Mosfet is
recommended to be no lower than 7mΩ)
Fig.6 shows the corresponding total delay during
turn-on period (t
Total
, see Fig.2) with driving
different Qg Mosfet by MP6902. From Fig.6, with
driving a 120nC Qg Mosfet, the driver ability of
MP6901 is able to pull up the gate driver voltage
of the Mosfet to ~5V in 300ns as soon as the
body diode of the Mosfet is conducting, which
greatly save the turn-on power loss in the
Mosfet’s body diode.
Id
Ipeak
Vg
SR Conduction Period
50% SR Conduction Period
Ic
Ipeak˜ 4·I
OUT
Ic˜ 2·I
OUT
Figure 5—Synchronous Rectification typical
waveforms in QR Flyback
Turn-on Delay vs . Qg
0
50
100
150
200
250
300
350
0 20 40 60 80 100 120 140
Qg (nC)
Total Delay (ns)
Figure 6—Total Turn-on Delay vs. Qg
P1-P3P4-P6P7-P9P10-P12

MP6901DS-LF

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Manufacturer:
Monolithic Power Systems (MPS)
Description:
Switching Controllers Fast-Off Intelligent Rectifier Driver
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