• PCIe edge connector
• Nios® II processor web server and remote system update
Stratix V GX FPGA Development Board Block Diagram
Terasic DVI-HSMC Card
Digital Transmitter
• One DVI transmitter with single transmitting port
• Digital Visual Interface (DVI) Compliant
• Supports resolutions from VGA to UXGA (25 MHz – 165 MHz Pixel Rates)
• Universal Graphics Controller Interface
◦ 12-Bit, Dual-Edge and 24-Bit, Single-Edge Input Modes
◦ Adjustable 1.1 V to 1.8 V and Standard 3.3 V CMOS Input Signal Levels
◦ Fully Differential and Single-Ended Input Clocking Modes
◦ Standard Intel 12-Bit Digital Video Port Compatible as on Intel™ 81x Chipsets
• Enhanced PLL Noise Immunity
◦ On-Chip Regulators and Bypass Capacitors for Reducing System Costs
• Enhanced Jitter Performance
◦ No HSYNC Jitter Anomaly
◦ Negligible Data-Dependent Jitter
■ Programmable Using I²C Serial Interface
■ Single 3.3-V Supply Operation
Digital Receiver
• One DVI receiver with single receiving port
• Supports UXGA Resolution (Output Pixel Rates Up to 165 MHz)
• Digital Visual Interface (DVI) Specification Compliant
