ADM8616/ADM8617
Rev. B | Page 9 of 12
APPLICATION INFORMATION
WATCHDOG INPUT CURRENT
To minimize watchdog input current (and minimize overall
power consumption), leave WDI low for the majority of the
watchdog timeout period. When driven high, WDI can draw as
much as 160 μA. Pulsing WDI low-high-low at a low duty cycle
reduces the effect of the large input current. When WDI is
unconnected, a window comparator disconnects the watchdog
timer from the
RESET
output circuitry so that
RESET
is not asserted when the watchdog timer times out.
NEGATIVE-GOING V
CC
TRANSIENTS
To avoid unnecessary resets caused by fast power supply
transients, the ADM8616/ADM8617 are equipped with glitch
rejection circuitry. The typical performance characteristic in
Figure 8 plots V
CC
transient duration vs. transient magnitude.
The curve shows combinations of transient magnitude and
duration for which a
RESET
is not generated for 4.63 V and
2.93 V reset threshold parts. For example, with the 2.93 V
threshold, a transient that goes 100 mV below the threshold
and lasts 8 μs typically does not cause a
RESET
, but if the
transient is any bigger in magnitude or duration, a
RESET
is
generated. An optional 0.1 μF bypass capacitor mounted close
to V
CC
provides additional glitch rejection.
ENSURING RESET VALID TO V
CC
= 0 V
The active-low
RESET
output is guaranteed to be valid for
V
CC
as low as 1 V. However, by using an external resistor,
valid outputs for V
CC
as low as 0 V are possible. The resistor,
connected between
RESET
and ground, pulls the output low
when it is unable to sink current. A large resistance, such as
100 kΩ, should be used so that it does not overload the
RESET
output when V
CC
is above 1 V.
ADM8616/
ADM8617
CC
RESET
100kΩ
4795-013
Figure 13. Ensuring
RESET
Valid to V
CC
= 0 V
WATCHDOG SOFTWARE CONSIDERATIONS
In implementing the microprocessors watchdog strobe
code, quickly switching WDI low to high and then high to
low (minimizing WDI high time) is desirable for current
consumption reasons. However, a more effective way of
using the watchdog function can be considered.
A low-high-low WDI pulse within a given subroutine prevents
the watchdog from timing out. However, if the subroutine
becomes stuck in an infinite loop, the watchdog does not detect
this because the subroutine continues to toggle WDI. A more
effective coding scheme for detecting this error involves using a
slightly longer watchdog timeout. In the program that calls
the subroutine, WDI is set high. The subroutine sets WDI low
when it is called. If the program executes without error, WDI is
toggled high and low with every loop of the program. If the
subroutine enters an infinite loop, WDI is kept low, the watch-
dog times out, and the microprocessor is reset.
START
SET WDI
HIGH
PROGRAM
CODE
SUBROUTINE
SET WDI
LOW
RETURN
INFINITE LOOP:
WATCHDOG
TIMES OUT
RESET
04795-014
Figure 14. Watchdog Flow Diagram
RESET RESET
WDI I/O
ADM8616/
ADM8617
CC
µP
04795-015
Figure 15. Typical Application Circuit
