NB6L611MNR2G

NB6L611
http://onsemi.com
4
Table 4. DC CHARACTERISTICS, MultiLevel Inputs V
CC
= 2.375 V to 3.63 V, V
EE
= 0 V, or V
CC
= 0 V, V
EE
= 2.375 V to
3.63 V, T
A
= 40°C to +85°C
Symbol
Characteristic Min Typ Max Unit
POWER SUPPLY CURRENT
I
CC
Power Supply Current (Inputs and Outputs Open) 30 45 60 mA
LVPECL OUTPUTS (Notes 4 and 5)
V
OH
Output HIGH Voltage
V
CC
= 3.3 V
V
CC
= 2.5 V
V
CC
1075
2225
1425
V
CC
950
2350
1550
V
CC
825
2475
1675
mV
V
OL
Output LOW Voltage
V
CC
= 3.3V
V
CC
= 2.5V
V
CC
1875
1475
675
V
CC
1725
1575
775
V
CC
1625
1675
875
mV
DIFFERENTIAL INPUT DRIVEN SINGLEENDED (see Figures 9 and 10) (Note 6)
V
th
Input Threshold Reference Voltage Range (Note 7) V
EE
+ 1050 V
CC
150 mV
V
IH
Singleended Input HIGH Voltage V
th
+ 150 V
CC
mV
V
IL
Singleended Input LOW Voltage V
EE
V
th
150 mV
V
ISE
Singleended Input Voltage Amplitude (V
IH
V
IL
) 300 V
CC
V
EE
mV
V
REFAC
V
REFAC
Output Reference Voltage (V
CC
25 V) V
CC
– 1.525 V
CC
– 1.425 V
CC
– 1.325 mV
DIFFERENTIAL INPUTS DRIVEN DIFFERENTIALLY (see Figures 11, 12 and 13) (Note 8)
V
IHD
Differential Input HIGH Voltage V
EE
+ 1200 V
CC
mV
V
ILD
Differential Input LOW Voltage V
EE
V
CC
150 mV
V
ID
Differential Input Voltage (V
IHD
V
ILD
) V
EE
+ 150 V
CC
V
EE
mV
V
CMR
Input Common Mode Range (Differential Configuration) (Note9) V
EE
+ 950 V
CC
75 mV
I
IH
Input HIGH Current D/D, (VTD/VTD Open) 150 150
mA
I
IL
Input LOW Current D/D, (VTD/VTD Open) 150 150
mA
TERMINATION RESISTORS
R
TIN
Internal Input Termination Resistor (Measured from D to VTD) 40 50 60
W
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
4. LVPECL outputs loaded with 50 W to V
CC
2.0 V for proper operation.
5. Input and output parameters vary 1:1 with V
CC
.
6. V
th
, V
IH
, V
IL,,
and V
ISE
parameters must be complied with simultaneously.
7. V
th
is applied to the complementary input when operating in singleended mode.
8. V
IHD
, V
ILD,
V
ID
and V
CMR
parameters must be complied with simultaneously.
9. V
CMR
minimum varies 1:1 with V
EE
, V
CMR
maximum varies 1:1 with V
CC
. The V
CMR
range is referenced to the most positive side of the
differential input signal.
NB6L611
http://onsemi.com
5
Table 5. AC CHARACTERISTICS V
CC
= 2.375 V to 3.63 V, V
EE
= 0 V, or V
CC
= 0 V, V
EE
= 2.375 V to 3.63 V,
T
A
= 40°C to +85°C; (Note 10)
Symbol
Characteristic Min Typ Max Unit
V
OUTPP
Output Voltage Amplitude (@ V
INPP
)f
in
1.5 GHz
f
in
= 2.0 GHz
(Note 14) (See Figure 3) f
in
= 3.0 GHz
f
in
= 4.0 GHz
725
520
320
170
780
680
500
400
mV
t
PD
Propagation Delay D to Q 225 280 375 ps
t
SKEW
Duty Cycle Skew (Note 11)
Within Device Skew
Device to Device Skew (Note 12)
3
15
15
80
ps
t
DC
Output Clock Duty Cycle f
in
4.0 GHz
(Reference Duty Cycle = 50%)
40 50 60 ps
t
JITTER
RMS Random Clock Jitter (Note 13) f
in
4.0 GHz 0.2 0.5 ps
V
INPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 14)
150 V
CC
V
EE
mV
t
r
,t
f
Output Rise/Fall Times @ 0.5 GHz (20% 80%) Q, Q 100 170 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
10.Measured by forcing V
INPP
(MIN) from a 50% duty cycle clock source. All loading with an external R
L
= 50 W to V
CC
2.0 V. Input edge rates
40 ps (20% 80%).
11. Duty cycle skew is measured between differential outputs using the deviations of the sum of T
pw
and T
pw
+ @ 0.5GHz.
12.Device to device skew is measured between outputs under identical transition @ 0.5 GHz.
13.Additive RMS jitter with 50% duty cycle clock signal.
14.Input and output voltage swing is a singleended measurement operating in differential mode.
800
700
600
500
400
300
200
100
0
0123
f
out
, CLOCK OUTPUT FREQUENCY (GHz)
V
OUTPP
OUTPUT VOLTAGE AMPLITUDE (mV)
(TYPICAL)
Figure 3. Output Voltage Amplitude (V
OUTPP
) versus Output
Frequency at Ambient Temperature (Typical)
4
NB6L611
http://onsemi.com
6
Figure 4. Typical Phase Noise Plot at
f
carrier
= 311.04 MHz
Figure 5. Typical Phase Noise Plot at
f
carrier
= 622.08 MHz
Figure 6. Typical Phase Noise Plot at
f
carrier
= 1 GHz
Figure 7. Typical Phase Noise Plot at
f
carrier
= 2 GHz
The above phase noise plots captured using Agilent
E5052A show additive phase noise of the NB6L611 device
at frequencies 311.04 MHz, 622.08 MHz, 1 GHz and 2 GHz
respectively at an operating voltage of 3.3 V in room
temperature. The RMS Phase Jitter contributed by the
device (integrated between 12 kHz and 20 MHz; as shown
in the shaded region of the plot) at each of the frequencies
is 44 fs, 11 fs, 8 fs and 6 fs respectively. The input source
used for the phase noise measurements is Agilent E8663B.

NB6L611MNR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Clock Buffer 1:2 PECL FANOUT
Lifecycle:
New from this manufacturer.
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