MP5013A – 5 V, 1 A-5 A PROGRAMMABLE CURRENT LIMIT SWITCH
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The ENABLE/FAULT line must remain at a high
level for the output to turn on.
The fault flag is an internal flip-flop that can be
set or re-set under the following conditions:
1. Thermal Shutdown: sets fault flag.
2. Under-Voltage: re-sets fault flag.
3. Low on ENABLE/FAULT: re-sets fault
flag.
4. Mid on ENABLE/FAULT: no effect.
During a thermal shutdown, ENABLE/FAULT is
driven to the mid level.
There are 4 types of faults, and each fault has a
direct and indirect effect on EANBLE/FAULT
and the internal fault flag (see Table 1). In a
typical application, there are one or more of the
MP5013A chips in a system. ENABLE/FAULT
lines are connected together typically.
Table 1—Fault function influence in application
Fault Description Internal Action Effect on Fault Pin Effect on Flag Effect on Secondary Part
Short/over current Limits current None None None
Under voltage Output turns off
Internally drives
ENABLE/FAULT to
logic low
Flag is re-set
Disables secondary output
and re-sets fault flag
Over voltage
Limits output
voltage
None None None
Thermal
shutdown
Shutdown. The part
is latched off until a
UVLO or externally
driven to ground.
Internally drives
ENABLE/FAULT
to mid level
Flag is set
Disables secondary part
output
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APPLICATION INFORMATION
Current Limit
The current limit is a function of the external
current-limit resistor. Table 2 lists examples of
current values as a function of the resistor value.
Rise Time
The rise time is a function of the capacitor (C
DV/DT
)
on DV/DT. Table 3 lists the typical rise time as a
function of capacitance.
Table 2—Current limit vs. current limit resistor (V
CC
= 5 V)
R
LIMIT
()
22 51 75 100 220
Trip current (A)
5 3.4 2.98 2.7 2.43
Hold current (A)
2.8 1.2 0.84 0.65 0.33
Table 3—Rise time vs. C
DV/DT
C
DV/DT
None 150 pF 470 pF 1 nF
Rise time
(ms, typically)
1.4 5.9 15.5 31.4
* NOTE: Rise time(ms) = 0.03ms*C
DV/DT
(pF)+1.4ms
The rise time is measured from 10% to 90% of
the output voltage (see Figure 2).
Figure 2—Rise time
MP5013A – 5 V, 1 A-5 A PROGRAMMABLE CURRENT LIMIT SWITCH
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PCB Layout Guidelines
Efficient PCB layout is critical to achieve stable
operation. For best results, please refer to Figure
3 and follow the guidelines below:
1. Place R
LIMIT
close to the I-LIMIT.
2. Place C
DV/DT
close to DV/DT.
3. Place the input capacitor close to VCC.
4. Place enough copper area near VCC and
SOURCE for thermal dissipation.
Top Layer
Bottom Layer
Figure 3—Sample PCB layout
Design Example
Table 4 shows a design example following the
application guidelines for the given specifications:
Table 4—Design example
V
IN
5 V
Trip current
5 A
Hold current
2.8 A
Figure 4 shows the application schematic. The
“Typical Performance Characteristics” section
shows the circuit waveforms. For more device
applications, please refer to the related
evaluation board datasheet.

MP5014AGJ-P

Mfr. #:
Manufacturer:
Monolithic Power Systems (MPS)
Description:
Hot Swap Voltage Controllers 12V 5A Programmable Current Limit Switch
Lifecycle:
New from this manufacturer.
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