LT3585-0/LT3585-1
LT3585-2/LT3585-3
16
3585f
Figure 11. LT3585-0 Photofl ash Charger Uses High Effi ciency 3mm Tall Transformer
+
DONE
CHRG/IADJ
V
IN
IGBTPWR
IGBTIN
IGBTPU
IGBTPD
V
BAT
SW
GND
LT3585-0
320V
TO GATE OF IGBT
C1: 4.7µF, 10V, X5R OR X7R
C2: 0.22µF, 10V, X5R OR X7R
C
OUT
: RUBYCON 330V, 50µF PHOTOFLASH OUTPUT CAPACITOR (FW SERIES)
D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES
R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED
T1: TDK LDT565630T-001, L
PRI
= 6µH, N = 10.4
3585 F11
C
OUT
PHOTOFLASH
CAPACITOR
C2
0.22µF
C1
4.7µF
R1
100k
V
IN
2.5V TO 8V
DONE
CHARGE
V
BAT
1.5V TO 8V
D1
T1
1:10.4
R2
20 TO 160
Figure 12. LT3585-1 Photofl ash Charger Uses High Effi ciency 2mm Tall Transformer
+
DONE
CHRG/IADJ
V
IN
IGBTPWR
IGBTIN
IGBTPU
IGBTPD
V
BAT
SW
GND
LT3585-1
320V
TO GATE OF IGBT
C1: 4.7µF, 10V, X5R OR X7R
C2: 0.22µF, 10V, X5R OR X7R
C
OUT
: RUBYCON 330V, 50µF PHOTOFLASH OUTPUT CAPACITOR (FW SERIES)
D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES
R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED
T1: LTD565620ST-203, L
PRI
= 8.2µH, N = 10.2
3585 F12
C
OUT
PHOTOFLASH
CAPACITOR
C2
0.22µF
C1
4.7µF
R1
100k
V
IN
2.5V TO 8V
DONE
CHARGE
V
BAT
1.5V TO 8V
D1
T1
1:10.2
R2
20 TO 160
TYPICAL APPLICATIO S
U
LT3585-0/LT3585-1
LT3585-2/LT3585-3
17
3585f
Figure 13. LT3585-2 Uses High Effi ciency 3mm Tall Transformers
+
DONE
CHRG/IADJ
V
IN
IGBTPWR
IGBTIN
IGBTPU
IGBTPD
V
BAT
SW
GND
LT3585-2
320V
TO GATE OF IGBT
C1: 4.7µF, 10V, X5R OR X7R
C2: 0.22µF, 10V, X5R OR X7R
RUBYCON 330V, 50µF PHOTOFLASH OUTPUT CAPACITOR (FW SERIES)
D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES
R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED
T1: TDK LDT565630T-003, L
PRI
= 10.5µH, N = 10.2
3585 F13
C
OUT
PHOTOFLASH
CAPACITOR
C2
0.22µF
C1
4.7µF
R1
100k
V
IN
2.5V TO 8V
DONE
CHARGE
V
BAT
1.5V TO 8V
D1
T1
1:10.2
R2
20 TO 160
TYPICAL APPLICATIO S
U
+
DONE
CHRG/IADJ
V
IN
IGBTPWR
IGBTIN
IGBTPU
IGBTPD
V
BAT
SW
GND
LT3585-3
320V
TO GATE OF IGBT
C1: 4.7µF, 10V, X5R OR X7R
C2: 0.22µF, 10V, X5R OR X7R
RUBYCON 330V, 50µF PHOTOFLASH OUTPUT CAPACITOR (FW SERIES)
D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES
R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED
T1: TDK LDT565630T-041, L
PRI
= 4.7µH, N = 10.4
3585 F14
C
OUT
PHOTOFLASH
CAPACITOR
C2
0.22µF
C1
4.7µF
R1
100k
V
IN
2.5V TO 8V
DONE
CHARGE
V
BAT
1.5V TO 8V
D1
T1
1:10.4
R2
20 TO 160
Figure 14. LT3585-3 Uses High Effi ciency 3mm Tall Transformers
LT3585-0/LT3585-1
LT3585-2/LT3585-3
18
3585f
TYPICAL APPLICATIO S
U
5
46
1 2 3
U1
V
IN
3585 F15
TO
DONE
R3
100k
1/10W
0402
R1
5k
1/10W
0402
R
T
100k
C
T
0.1 F
ENABLE
TO
CHRG/IADJ
U1: PANASONIC UP04979 COMPOSITE TRANSISTORS
Figure 15. Auto Refresh Application
V
OUT
100V/DIV
CHRG/IADJ
2V/DIV
ENABLE
2V/DIV
2sec/DIVLT3585-1
C
OUT
= 50µF
ENABLE < 0.3V
ENABLE > 1.1V
NORMAL OP.
AUTO
REFRESH
AUTO
REFRESH
ENABLE
<0.3V
ENABLE
>1.1V
ENABLE < 0.3V
3585 F16
V
OUT
2V/DIV
AC RIPPLE
CHRG/IADJ
2V/DIV
200ms/DIVLT3585-1
C
OUT
= 50µF
3585 F17
Figure 16. Auto Refresh Basic Operation
Figure 17. V
OUT
AC Ripple in Auto Refresh Mode
The LT3585 series can be auto-refreshed using the addi-
tional circuitry shown in Figure 15 with its basic operation
shown in Figure 16. The ENABLE pin is used to enable
or disable the auto-refresh charging mode. Without an
auto-refresh circuit, the output voltage will droop due to
output capacitor and output diode leakage currents. The
circuit in Figure 15 uses the DONE and CHRG/IADJ pins
to form an open-loop control scheme. The output voltage
target is sensed through the DONE pin with the PFET of
U1, Panasonic UP04979 composite transistor. When the
DONE pin goes low during the V
OUT
trip condition, the
PFET charges the auto-refresh timing node comprised
of R
T
and C
T
, and in turn, pulls the CHRG/IADJ pin low
through a NFET and disables the LT3585 series part. The
DONE pin immediately goes high in shutdown, releasing
the timing node and allowing the voltage at Pins 2 and 3
to decay. After approximately a R
T
C
T
time constant, the
CHRG/IADJ pin is released and the LT3585 series part is
enabled. This cycle is repeated to maintain a constant DC
output voltage. The open-loop control method places a
constraint on the control loop dominant time constant,
R
T
• C
T
, given by:
RC
IL
IV
TT
PK PRI
LK BAT
>
2
2
••
where I
LK
is the known leakage current, I
PK
is the trans-
former peak primary current, and L
PRI
is the transformer
primary inductance. If this condition is not met, a runaway
condition could occur. The LT3585 series part would
continue to charge the output voltage past the internal
output trip voltage. Figure 17 shows the AC ripple of a
typical auto-refresh circuit with the proper selection of
R
T
and C
T
.

LT3585EDDB-2#TRMPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Power Management Specialized - PMIC Photoflash Chr w/ Adj In C & IGBT Drvr
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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