25
LTC2400
APPLICATIONS INFORMATION
WUU
U
INPUT FREQUENCY
0
–60
–40
0
2400 F26
–80
100
f
S
/2 f
S
120
140
–20
REJECTION (dB)
Figure 26. Sinc
4
Filter Rejection
RESISTANCE AT V
REF
()
0
–20
INL ERROR (ppm)
0
40
60
80
400
800
1000
160
2400 F25
20
200 600
100
120
140
C
VREF
= 0.01µF
C
VREF
= 0.1µF
C
VREF
= 1µF
C
VREF
= 10µF
V
CC
= 5V
V
REF
= 5V
T
A
= 25°C
Figure 25. INL Error vs R
VREF
(Large C)
In addition to the dynamic reference current, the V
REF
ESD
protection diodes have a temperature dependent leakage
current. This leakage current, nominally 1nA (±10nA max),
results in a fixed full-scale shift of 10µV for a 10k source
resistance.
ANTIALIASING
One of the advantages delta-sigma ADCs offer over con-
ventional ADCs is on-chip digital filtering. Combined with
a large oversampling ratio, the LTC2400 significantly
simplifies antialiasing filter requirements.
The digital filter provides very high rejection except at
integer multiples of the modulator sampling frequency
(f
S
), see Figure 26. The modulator sampling frequency is
256 • F
O
, where F
O
is the notch frequency (typically 50Hz
or 60Hz). The bandwidth of signals not rejected by the
digital filter is narrow (0.2%) compared to the bandwidth
of the frequencies rejected.
As a result of the oversampling ratio (256) and the digital
filter, minimal (if any) antialias filtering is required in front
of the LTC2400. If passive RC components are placed in
front of the LTC2400 the input dynamic current should be
considered (see Input Current section). In cases where
large effective RC time constants are used, an external
buffer amplifier may be required to minimize the effects of
input dynamic current.
The modulator contained within the LTC2400 can handle
large-signal level perturbations without saturating. Signal
levels up to 40% of V
REF
do not saturate the analog modu-
lator. These signals are limited by the input ESD protection
to 300mV below ground and 300mV above V
CC
.
26
LTC2400
TYPICAL APPLICATIONS
U
SYNCHRONIZATION OF MULTIPLE LTC2400s
Since the LTC2400’s absolute accuracy (total unadjusted
error) is 10ppm, applications utilizing multiple matched
ADCs are possible.
Simultaneous Sampling with Two LTC2400s
One such application is synchronizing multiple LTC2400s,
see Figure 27. The start of conversion is synchronized to
the rising edge of CS. In order to synchronize multiple
LTC2400s, CS is a common input to all the ADCs.
To prevent the converters from autostarting a new con-
version at the end of data output read, 31 or fewer SCK
clock signals are applied to the LTC2400 instead of 32 (the
32nd falling edge would start a conversion). The exact
timing and frequency for the SCK signal is not critical
since it is only shifting out the data. In this case, two
LTC2400’s simultaneously start and end their conversion
cycles under the external control of CS.
Increasing the Output Rate Using Multiple LTC2400s
A second application uses multiple LTC2400s to increase
the effective output rate by 4×, see Figure 28. In this case,
four LTC2400s are interleaved under the control of sepa-
rate CS signals. This increases the effective output rate
from 7.5Hz to 30Hz (up to a maximum of 60Hz). Addition-
ally, the one-shot output spectrum is unfolded allowing
further digital signal processing of the conversion results.
SCK and SDO may be common to all four LTC2400s. The
four CS rising edges equally divide one LTC2400 conver-
sion cycle (7.5Hz for 60Hz notch frequency). In order to
synchronize the start of conversion to CS, 31 or less SCK
clock pulses must be applied to each ADC.
Both the synchronous and 4× output rate applications use
the external serial clock and single cycle operation with
reduced data output length (see Serial Interface Timing
Modes section and Figure 6). An external oscillator clock
is applied commonly to the F
O
pin of each LTC2400 in
order to synchronize the sampling times. Both circuits
may be extended to include more LTC2400s.
31 OR LESS CLOCK CYCLES
CS
SCK1
SCK2
2400 F27
SDO1
SDO2
31 OR LESS CLOCK CYCLES
LTC2400
#1
V
CC
V
REF
V
IN
GND
F
O
SCK
SDO
CS
SCK2
SCK1
CS
SDO1
SDO2
LTC2400
#2
V
CC
V
REF
V
IN
GND
F
O
SCK
SDO
CS
µCONTROLLER
EXTERNAL OSCILLATOR
(153,600HZ)
V
REF
(0.1V TO V
CC
)
Figure 27. Synchronous Conversion—Extendable
27
LTC2400
TYPICAL APPLICATIONS
U
CS1
CS2
CS3
2400 F28
CS4
SCK
31 OR LESS
CLOCK PULSES
SDO
LTC2400
#1
V
CC
V
REF
V
IN
GND
F
O
SCK
SDO
CS
SCK
SDO
CS1
CS2
CS3
CS4
LTC2400
#2
V
CC
V
REF
V
IN
GND
F
O
SCK
SDO
CS
LTC2400
#3
V
CC
V
REF
V
IN
GND
F
O
SCK
SDO
CS
LTC2400
#4
V
CC
V
REF
V
IN
GND
F
O
SCK
SDO
CS
µCONTROLLER
EXTERNAL OSCILLATOR
(153,600HZ)
V
REF
(0.1V TO V
CC
)
Figure 28. 4× Output Rate LTC2400 System
Differential to Single-Ended
Analog Conditioning
The circuits in Figures 29 and 30 use the LTC1043 dual
precision, switched capacitor building block. Each circuit
uses one-half of an LTC1043 to perform a differential to
single-ended conversion over an input common mode
range that includes the power supplies. The LTC1043
samples a differential input voltage, holds it on C
S
and
transfers it to a ground-referenced capacitor C
H
. The
voltage on C
H
is applied to the LTC2400’s input and
converted to a digital value.
The LTC1043 achieves its best differential to single-ended
conversion when its internal switching frequency oper-
ates at a nominal 300Hz, as set by the 0.01µF capacitor C1,
and when 1µF capacitors are used for C
S
and C
H
. C
S
and
C
H
should be a film-type capacitor such as mylar or
polypropylene.
Simple Differential Front-End
for the LTC2400
The circuit in Figure 29 is ideal for wide dynamic range
differential signals in applications where absolute accu-
racy is secondary to high resolution, have large signal
swings, source impedances under 500 and use a 5V or
±5V supply.
The circuit achieves a nonlinearity of ±35ppm (a linearity
accuracy of 14.5 bits), noise of 1.5µV
RMS
and 21-bit
resolution. The circuit exhibits a typical 2.75mV zero
offset. However, this is not an offset that simply shifts the
output code by a constant value. It is a gain error that alters
the transfer function’s slope. The gain error revolves
around midscale (V
REF
/2). This gain error can be corrected
in software by measuring the error at 0V input and using
the result to create a correction factor.

LTC2400IS8#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 24-B Pwr No Lat Delta-Sigma ADC in SO-
Lifecycle:
New from this manufacturer.
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