22
LTC2400
connection resistance. The LTC2400’s power supply cur-
rent flowing through the 0.01 resistance of the common
ground pin will develop a 2.5µV offset signal. For a
reference voltage V
REF
= 2.5V, this represents a 1ppm
offset error.
In an alternative configuration, the GND pin of the converter
can be the single-point-ground in a single point grounding
system. The input signal ground, the reference signal
ground, the digital drivers ground (usually the digital
ground) and the power supply ground (the analog ground)
should be connected in a star configuration with the com-
mon point located as close to the GND pin as possible.
The power supply current during the conversion state
should be kept to a minimum. This is achieved by restrict-
ing the number of digital signal transitions occurring
during this period.
While a digital input signal is in the range 0.5V to
(V
CC
–␣ 0.5V), the CMOS input receiver draws additional
current from the power supply. It should be noted that,
when any one of the digital input signals (F
O
, CS and SCK
in External SCK mode of operation) is within this range, the
LTC2400 power supply current may increase even if the
signal in question is at a valid logic level. For micropower
operation and in order to minimize the potential errors due
to additional ground pin current, it is recommended to
drive all digital input signals to full CMOS levels
[V
IL
< 0.4V and V
OH
> (V
CC
– 0.4V)].
Severe ground pin current disturbances can also occur
due to the undershoot of fast digital input signals. Under-
shoot and overshoot can occur because of the impedance
mismatch at the converter pin when the transition time of
an external control signal is less than twice the propaga-
tion delay from the driver to LTC2400. For reference, on
a regular FR-4 board, signal propagation velocity is ap-
proximately 183ps/inch for internal traces and 170ps/inch
for surface traces. Thus, a driver generating a control
signal with a minimum transition time of 1ns must be
connected to the converter pin through a trace shorter
than 2.5 inches. This problem becomes particularly diffi-
cult when shared control lines are used and multiple
reflections may occur. The solution is to carefully termi-
nate all transmission lines close to their characteristic
impedance.
APPLICATIONS INFORMATION
WUU
U
V
REF
V
IN
V
CC
R
SW
5k
AVERAGE INPUT CURRENT:
I
IN
= 0.25(V
IN
– 0.5 • V
REF
)fC
EQ
I
REF(LEAK)
I
REF(LEAK)
V
CC
R
SW
5k
C
EQ
10pF (TYP)
R
SW
5k
I
IN(LEAK)
I
IN
2400 F15
I
IN(LEAK)
SWITCHING FREQUENCY
f = 153.6kHz FOR INTERNAL OSCILLATOR (f
O
= LOGIC LOW OR HIGH)
f = f
EOSC
FOR EXTERNAL OSCILLATORS
GND
Figure 15. LTC2400 Equivalent Analog Input Circuit
Parallel termination near the LTC2400 pin will eliminate
this problem but will increase the driver power dissipation.
A series resistor between 27 and 56 placed near the
driver or near the LTC2400 pin will also eliminate this
problem without additional power dissipation. The actual
resistor value depends upon the trace impedance and
connection topology.
Driving the Input and Reference
The analog input and reference of the typical delta-sigma
analog-to-digital converter are applied to a switched ca-
pacitor network. This network consists of capacitors
switching between the analog input (V
IN
), ground (Pin 4)
and the reference (V
REF
). The result is small current spikes
seen at both V
IN
and V
REF
. A simplified input equivalent
circuit is shown in Figure 15.
The key to understanding the effects of this dynamic input
current is based on a simple first order RC time constant
model. Using the internal oscillator, the LTC2400’s inter-
nal switched capacitor network is clocked at 153,600Hz
corresponding to a 6.5µs sampling period. Fourteen time
constants are required each time a capacitor is switched in
order to achieve 1ppm settling accuracy.
Therefore, the equivalent time constant at V
IN
and V
REF
should be less than 6.5µs/14 = 460ns in order to achieve
1ppm accuracy.
23
LTC2400
APPLICATIONS INFORMATION
WUU
U
C
IN
2400 F17
INTPUT
SIGNAL
SOURCE
R
SOURCE
V
IN
LTC2400
C
PAR
20pF
Figure 17. An RC Network at V
IN
R
SOURCE
()
1
OFFSET ERROR (ppm)
30
40
50
10k
2400 F18
20
10
0
10
100
1k
100k
V
CC
= 5V
V
REF
= 5V
V
IN
= 0V
T
A
= 25°C
C
IN
= 100pF
C
IN
= 1000pF
C
IN
= 0pF
C
IN
= 0.01µF
Figure 18. Offset vs R
SOURCE
(Small C)
R
SOURCE
()
1
FULL-SCALE ERROR (ppm)
–20
–10
0
10k
2400 F19
–30
–40
–50
10
100
1k
100k
V
CC
= 5V
V
REF
= 5V
V
IN
= 5V
T
A
= 25°C
C
IN
= 0pF
C
IN
= 100pF
C
IN
= 1000pF
C
IN
= 0.01µF
Figure 19. Full-Scale Error vs R
SOURCE
(Small C)
R
SOURCE
()
0
OFFSET ERROR (ppm)
100
200
300
50
150
250
200 400 600 800
2400 F20
10001000 300 500 700 900
V
CC
= 5V
V
REF
= 5V
V
IN
= 0V
T
A
= 25°C
C
IN
= 1µF
C
IN
= 10µF
C
IN
= 0.1µF
C
IN
= 0.01µF
Figure 20. Offset vs R
SOURCE
(Large C)
0
TUE
V
REF
/2
V
IN
2400 F16
V
REF
Figure 16. Offset/Full-Scale Shift
Input Current (V
IN
)
If complete settling occurs on the input, conversion re-
sults will be uneffected by the dynamic input current. If the
settling is incomplete, it does not degrade the linearity
performance of the device. It simply results in an offset/
full-scale shift, see Figure 16. To simplify the analysis of
input dynamic current, two separate cases are assumed:
large capacitance at V
IN
(C
IN
> 0.01µF) and small capaci-
tance at V
IN
(C
IN
< 0.01µF).
If the total capacitance at V
IN
(see Figure 17) is small
(<0.01µF), relatively large external source resistances (up
to 20k for 20pF parasitic capacitance) can be tolerated
without any offset/full-scale error. Figures 18 and 19 show
a family of offset and full-scale error curves for various
small valued input capacitors (C
IN
< 0.01µF) as a function
of input source resistance.
For large input capacitor values (C
IN
> 0.01µF), the input
spikes are averaged by the capacitor into a DC current. The
gain shift becomes a linear function of input source
resistance independent of input capacitance, see Figures
20 and 21. The equivalent input impedance is 1.66M.
This results in ±1.5µA of input dynamic current at the
extreme values of V
IN
(V
IN
= 0V and V
IN
= V
REF
, when
24
LTC2400
V
REF
= 5V). This corresponds to a 0.3ppm shift in offset
and full-scale readings for every 1 of input source
resistance.
In addition to the input current spikes, the input ESD
protection diodes have a temperature dependent leakage
current. This leakage current, nominally 1nA (±10nA
max), results in a fixed offset shift of 10µV for a 10k source
resistance.
Reference Current (V
REF
)
Similar to the analog input, the reference input has a
dynamic input current. This current has negligible effect
on the offset. However, the reference current at V
IN
= V
REF
is similar to the input current at full-scale. For large values
of reference capacitance (C
VREF
> 0.01µF), the full-scale
error shift is 0.3ppm/ of external reference resistance
independent of the capacitance at V
REF
, see Figure 22. If
the capacitance tied to V
REF
is small (C
VREF
< 0.01µF), an
input resistance of up to 20k (20pF parasitic capacitance
at V
REF
) may be tolerated, see Figure 23.
Unlike the analog input, the integral nonlinearity of the
device can be degraded with excessive external RC time
constants tied to the reference input. If the capacitance at
node V
REF
is small (C
VREF
< 0.01µF), the reference input
can tolerate large external resistances without reduction
in INL, see Figure 24. If the external capacitance is large
(C
VREF
> 0.01µF), the linearity will be degraded by
0.15ppm/ independent of capacitance at V
REF
, see
Figure 25.
APPLICATIONS INFORMATION
WUU
U
RESISTANCE AT V
REF
()
0
0
FULL-SCALE ERROR (ppm)
100
200
300
400
500
600
200 400 600 800
2400 F22
1000
C
VREF
= 10µF
C
VREF
= 0.01µF
C
VREF
= 0.1µF
V
CC
= 5V
V
REF
= 5V
V
IN
= 5V
T
A
= 25°C
C
VREF
= 1µF
Figure 22. Full-Scale Error vs R
VREF
(Large C)
RESISTANCE AT V
REF
()
1
30
40
50
1k
2400 F23
20
10
10 100 100k10k
0
–10
–20
FULL-SCALE ERROR (ppm)
V
CC
= 5V
V
REF
= 5V
V
IN
= 5V
T
A
= 25°C
C
VREF
= 100pF
C
VREF
= 1000pF
C
VREF
= 0.01µF
C
VREF
= 0pF
Figure 23. Full-Scale Error vs R
VREF
(Small C)
RESISTANCE AT V
REF
()
1
–10
INL ERROR (ppm)
0
10
20
30
40
50
10 100 1k 10k
2400 F24
100k
V
CC
= 5V
V
REF
= 5V
T
A
= 25°C
C
VREF
= 0pF
C
VREF
= 100pF
C
VREF
= 1000pF
C
VREF
= 0.01µF
Figure 24. INL Error vs R
VREF
(Small C)
R
SOURCE
()
0
300
FULL-SCALE ERROR (ppm)
250
200
150
100
–50
0
200 400 600 800
2400 F21
1000
C
IN
= 0.01µF
V
CC
= 5V
V
REF
= 5V
V
IN
= 5V
T
A
= 25°C
C
IN
= 0.1µF
C
IN
= 1µF
C
IN
= 10µF
Figure 21. Full-Scale Error vs R
SOURCE
(Large C)

LTC2400IS8#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 24-B Pwr No Lat Delta-Sigma ADC in SO-
Lifecycle:
New from this manufacturer.
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