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ADV3202ASWZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
ADV3202/ADV3203
Rev. 0 | Page 10 of 20
TRUTH TABLE AND LOGIC DIAGRAM
Table 8. Operation Truth Table
CS
UPDATE
CLK DATA INPUT DATA OUTPUT
RESET
Operation/Comment
X X X X X 0
Asynchronous reset. All outputs are disabled; the 193-bit shift
register is reset to all 0s.
0 1
Data
i
1
Data
i-193
1
The data on the serial DATA IN line is loaded into the serial
register. The first bit clocked into the serial register appears at
DATA OUT 193 clock cycles later.
0 0 X X X 1
Switch matrix update. Data in the 193-bit shift register transfers
into the parallel latches that control the switch array and sync-
tip clamps.
1 X X X X 1 Chip is not selected. No change in logic.
1
Data
i
: serial data.
ADV3202/ADV3203
Rev. 0 | Page 11 of
–12
1 10 100 1k
FREQUENCY (MHz)
07526-005
20
TYPICAL PERFORMANCE CHARACTERISTICS
V
S
= ±2.5 V (ADV3202), V
S
= ±3.3 V (ADV3203) at T
A
= 25°C, R
L
= 150 .
2
0
–2
–4
–6
–8
–10
GAIN (dB)
INxx
OSDxx
Figure 5. ADV3202 Small Signal Frequency Response, 200 mV p-p
2
0
–2
–4
–6
–8
–10
GAIN (dB)
1.2
0.8
0.4
0
–0.4
–0.8
–1.2
0 2 4 6 8 101214161820
TIME (ns)
V
OUT
(V)
07526-008
INxx
OSDxx
Figure 8. ADV3202 Large Signal Pulse Response, 2 V p-p
600
400
200
0
–200
–400
–600
02468101214161820
TIME (ns)
07526-009
–12
1 10 100 1k
FREQUENCY (MHz)
07526-006
INxx
OSDxx
Figure 6. ADV3202 Large Signal Frequency Response, 2 V p-p
0.12
0.08
0.04
0
–0.04
–0.08
V
OUT
(V)
RISING EDGE
–0.12
0 2 4 6 8 101214161820
TIME (ns)
07526-007
INxx
OSDxx
Figure 7. ADV3202 Small Signal Pulse Response, 200 mV p-p
FALLING EDGE
dV/dT (V/µs)
Figure 9. ADV3202 Slew Rate
0.05
0.04
0.03
0.02
0.01
0
–0.01
–0.02
–0.03
–0.04
–0.05
–0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7
INPUT DC OFFSET (V)
DIFFERENTIAL GAIN (%)
07526-010
Figure 10. ADV3202 Differential Gain, Carrier Frequency = 3.58 MHz,
Subcarrier Amplitude = 300 mV p-p
ADV3202/ADV3203
Rev. 0 | Page 12 of 20
0.010
0.005
0
–0.005
–0.010
–0.015
DIFFERENTIAL PHASE (Degrees)
0.12
0.08
0.04
0
–0.04
–0.08
–0.12
0 2 4 6 8 101214161820
TIME (ns)
V
OUT
(V)
07526-014
–0.020
–0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7
INPUT DC OFFSET (V)
07526-011
Figure 11. ADV3202 Differential Phase, Carrier Frequency = 3.58 MHz,
Subcarrier Amplitude = 300 mV p-p
8
6
4
2
0
–2
–4
GAIN (dB)
OSDxx
INxx
Figure 14. ADV3203 Small Signal Pulse Response, 200 mV p-p
1.2
0.8
0.4
0
–0.4
–0.8
–1.2
0 2 4 6 8 101214161820
TIME (ns)
V
OUT
(V)
07526-015
–6
1 10 100 1k
FREQUENCY (MHz)
526-01207
OSDxx
INxx
Figure 12. ADV3203 Small Signal Frequency Response, 200 mV p-p
8
6
4
2
0
–2
–4
GAIN (dB)
OSDxx
INxx
600
400
200
0
–200
–400
–600
0 2 4 6 8 101214 161820
dV/dT (V/µs)
6-016
Figure 15. ADV3203 Large Signal Pulse Response, 2 V p-p
TIME (ns)
0752
–6
1 10 100 1k
FREQUENCY (MHz)
07526-013
OSDxx
INxx
Figure 13. ADV3203 Large Signal Frequency Response, 2 V p-p
RISING EDGE
FALLING EDGE
Figure 16. ADV3203 Slew Rate
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

ADV3202ASWZ

Mfr. #:
Buy ADV3202ASWZ
Manufacturer:
Analog Devices Inc.
Description:
Analog & Digital Crosspoint ICs 300 MHz 32 x 16 Buffered
Lifecycle:
New from this manufacturer.
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