Data Sheet ADG1611/ADG1612/ADG1613
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
D1
S1
V
SS
D4
S4
GND
IN1
IN4
16
15
14
13
12
11
10
9
D2
S2
V
DD
D3
IN3
S3
NIC
IN2
07981-002
TOP VIEW
(Not to Scale)
ADG1611/
ADG1612/
ADG1613
NOTES
1. NIC = NOT INTERNALLY CONNECTED.
Figure 4. 16-Lead TSSOP Pin Configuration
07981-003
NOTES
1. NIC = NOT INTERNALLY CONNECTED.
2. EXPOSED PAD TIED TO SUBSTRATE, V
SS
.
12
11
10
1
3
4
9
2
6
5
7
8
16
15
14
13
ADG1611/
ADG1612/
ADG1613
TOP VIEW
(Not to Scale)
S1
V
SS
GND
S4
S2
D2
IN2
IN1
D1
V
DD
NIC
S3
D4
IN4
IN3
D3
Figure 5. 16-Lead LFCSP Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
Mnemonic Description
16-Lead TSSOP 16-Lead LFCSP
1 15 IN1 Logic Control Input.
2 16 D1 Drain Terminal. This pin can be an input or output.
Source Terminal. This pin can be an input or output.
4 2 V
SS
Most Negative Power Supply Potential.
5 3 GND Ground (0 V) Reference.
6 4 S4 Source Terminal. This pin can be an input or output.
7 5 D4 Drain Terminal. This pin can be an input or output.
8 6 IN4 Logic Control Input.
9 7 IN3 Logic Control Input.
10 8 D3 Drain Terminal. This pin can be an input or output.
11 9 S3 Source Terminal. This pin can be an input or output.
12 10 NIC Not Internally Connected.
13 11 V
DD
Most Positive Power Supply Potential.
14 12 S2 Source Terminal. This pin can be an input or output.
Drain Terminal. This pin can be an input or output.
16 14 IN2 Logic Control Input.
Not applicable 17 (EPAD) EP (EPAD) Exposed Pad. Tied to substrate, V
SS
.
Table 8. ADG1611/ADG1612 Truth Table
ADG1611 INx ADG1612 INx Switch Condition
0 1 On
1 0 Off
Table 9. ADG1613 Truth Table
Logic (INx) Switch 1, Switch 4 Switch 2, Switch 3
0 Off On
1 On Off
Rev. C | Page 9 of 16