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IPD135N08N3GATMA1
P1-P3
P4-P6
P7-P9
IPD135N08N3 G
Opti
MOS
(TM)
3 Pow
er-Transistor
Features
• Ideal for high frequency
switching
• Optimized technology
for DC/DC converters
• Excellent gate charge x
R
DS(on)
product (FOM)
• N-channel, normal level
• 100% avalanche te
sted
• Pb-free plating; RoHS compliant
• Qualified according to JEDEC
1)
for target applications
• Halogen-free according to IEC61249-2-21
Maximum ratings,
at
T
j
=25 °C, unless otherw
ise specified
Parameter
Symbol
Conditions
Unit
Continuous drain current
I
D
T
C
=25 °C
2)
45
A
T
C
=100 °C
39
Pulsed drain current
2)
I
D,pulse
T
C
=25 °C
180
Avalanche energy
, singl
e pulse
3)
E
AS
I
D
=45 A,
R
GS
=25
W
50
mJ
Gate source voltage
V
GS
±20
V
Power dissipati
on
P
tot
T
C
=25 °C
79
W
Operating and storage temperature
T
j
,
T
stg
-55 ... 175
°C
IEC climatic category; DIN IE
C 68-1
55/175/56
3)
See figure 1
3 for more deta
iled informa
tion
Value
1)
J-STD20 and JESD22
2)
See figure 3
for more detai
led informati
on
V
DS
80
V
R
DS(on),max
13.5
m
W
I
D
45
A
Product Summary
Type
IPD135N08N3 G
Package
PG
-
TO
-
252
-3
Marking
135N08N
Rev. 2.2
page 1
2014-05-19
IPD135N08N3 G
Parameter
Symbol
Conditions
Unit
min.
typ.
max.
Thermal characteristics
Therm
al resistance, junction - case
R
thJC
-
-
1.9
K/W
Therm
al resistance,
R
thJA
minim
al footprint
-
-
62
junction - ambient
6 cm
2
cooling area
4)
-
-
40
Electrical characteristics,
at
T
j
=25 °C, unless otherw
ise specified
Static characteristics
Drain-source breakdown voltage
V
(BR)DSS
V
GS
=0 V,
I
D
=1 mA
80
-
-
V
Gate threshold voltag
e
V
GS(th)
V
DS
=
V
GS
,
I
D
=33 µA
2
2.8
3.5
Zero gate voltage d
rain current
I
DSS
V
DS
=80 V,
V
GS
=0 V,
T
j
=25 °C
-
0.1
1
µA
V
DS
=80 V,
V
GS
=0 V,
T
j
=125 °C
-
10
100
Gate-source leakage current
I
GSS
V
GS
=20 V,
V
DS
=0 V
-
1
100
nA
Drain-source on-state resistance
R
DS(on)
V
GS
=10 V,
I
D
=45 A
-
11.4
13.5
m
W
V
GS
=6 V,
I
D
=22.5 A
-
16.0
26
Gate resistance
R
G
-
2
-
W
Transconductance
g
fs
|
V
DS
|>2|
I
D
|
R
DS(on)ma
x
,
I
D
=45 A
24
48
-
S
4)
Device on 40 m
m x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm
2
(one layer, 70 µm
thick) cop
per area for drai
n
connecti
on. PCB is vertical
in still a
ir.
Values
Rev. 2.2
page 2
2014-05-19
IPD135N08N3 G
Parameter
Symbol
Conditions
Unit
min.
typ.
max.
Dynamic characteristics
Input capacitance
C
iss
-
1300
1730
pF
Output capacitance
C
oss
-
353
469
Reverse transfer capacitance
C
rss
-
15
-
Turn-on delay
time
t
d(on)
-
12
-
ns
Rise time
t
r
-
35
-
Turn-of
f delay
time
t
d(off)
-
18
-
Fall time
t
f
-
5
-
Gate Charge Characteristics
5)
Gate to source charge
Q
gs
-
7
-
nC
Gate to drain charge
Q
gd
-
4
-
Switching
charge
Q
sw
-
8
-
Gate charge total
Q
g
-
19
25
Gate plateau vol
tage
V
plateau
-
5.5
-
V
Output charge
Q
oss
V
DD
=40 V,
V
GS
=0 V
-
25
34
nC
Reverse Diode
Diode continous forward current
I
S
-
-
45
A
Diode pulse current
I
S,pulse
-
-
180
Diode forward voltag
e
V
SD
V
GS
=0 V,
I
F
=45 A,
T
j
=25 °C
-
1.0
1.2
V
Reverse recovery
time
t
rr
-
50
-
ns
Reverse recovery
charge
Q
rr
-
74
-
nC
5)
See figure 1
6 for gate cha
rge parameter d
efinition
V
R
=40 V,
I
F
=
I
S
,
d
i
F
/d
t
=100 A/µs
T
C
=25 °C
Values
V
GS
=0 V,
V
DS
=40 V,
f
=1 MHz
V
DD
=40 V,
V
GS
=10 V,
I
D
=45 A,
R
G,ext
=1.6
W
V
DD
=40 V,
I
D
=45 A,
V
GS
=0 to 10 V
Rev. 2.2
page 3
2014-05-19
P1-P3
P4-P6
P7-P9
IPD135N08N3GATMA1
Mfr. #:
Buy IPD135N08N3GATMA1
Manufacturer:
Infineon Technologies
Description:
MOSFET MV POWER MOS
Lifecycle:
New from this manufacturer.
Delivery:
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