LT5568
10
5568f
APPLICATIO S I FOR ATIO
WUU
U
LO Section
The internal LO input amplifi er performs single-ended to
differential conversion of the LO input signal. Figure 4
shows the equivalent circuit schematic of the LO input.
Table 1. LO Port Input Impedance vs Frequency for EN = High
and P
LO
= 0dBm
Frequency Input Impedance S
11
MHz
Ω
Mag Angle
500 47.5 + j12.1 0.126 95.0
600 59.4 + j8.4 0.115 37.8
700 66.2 – j1.14 0.140 –3.41
800 67.2 – j13.4 0.185 –31.7
900 61.1 – j23.9 0.232 –53.2
1000 53.3 – j26.8 0.252 –68.7
1100 48.2 – j26.1 0.258 –79.4
1200 42.0 – j27.4 0.297 –90.0
If the part is in shutdown mode, the input impedance of
the LO port will be different. The LO input impedance for
EN = Low is given in Table 2.
Table 2. LO Port Input Impedance vs Frequency for EN = Low and
P
LO
= 0dBm
Frequency Input Impedance S
11
MHz
Ω
Mag Angle
500 33.6 + j41.3 0.477 85.4
600 59.8 + j69.1 0.539 49.8
700 140 + j89.8 0.606 19.6
800 225 – j62.6 0.659 –6.8
900 92.9 – j128 0.704 –29.6
1000 39.8 – j95.9 0.735 –45.5
1100 22.8 – j72.7 0.755 –65.6
1200 16.0 – j57.3 0.763 –79.7
RF Section
After up-conversion, the RF outputs of the I and Q mixers are
combined. An on-chip balun performs internal differential
to single-ended output conversion, while transforming the
output signal impedance to 50Ω. Table 3 shows the RF
port output impedance vs frequency.
Table 3. RF Port Output Impedance vs Frequency for EN = High
and P
LO
= 0dBm
Frequency Input Impedance S
22
MHz
Ω
Mag Angle
500 22.0 + j5.7 0.395 164.2
600 28.2 + j12.5 0.317 141.3
700 38.8 + j14.8 0.206 117.5
800 49.4 + j7.2 0.072 90.6
900 49.3 – j5.1 0.051 –94.7
1000 42.5 – j11.1 0.143 –117.0
1100 36.7 – j11.7 0.202 –130.7
1200 33.0 – j10.3 0.238 –141.6
LO
INPUT
20pF
51Ω
5568 F04
V
CC
The internal, differential LO signal is then split into in-phase
and quadrature (90° phase shifted) signals that drive LO
buffer sections. These buffers drive the double balanced
I and Q mixers. The phase relationship between the LO
input and the internal in-phase LO and quadrature LO
signals is fi xed, and is independent of start-up conditions.
The internal phase shifters are designed to deliver accu-
rate quadrature signals. For LO frequencies signifi cantly
below 600MHz or above 1GHz, however, the quadrature
accuracy will diminish, causing the image rejection to
degrade. The LO pin input impedance is about 50Ω, and
the recommended LO input power is 0dBm. For lower
LO input power, the gain, OIP2, OIP3 and noise fl oor at
P
RF
= 4dBm will degrade, especially below –5dBm and at
T
A
= 85°C. For high LO input power (e.g., +5dBm), the LO
feedthrough will increase with no improvement in linearity
or gain. For lower LO input power, e.g., P
LO
= –5dBm, the
image rejection improves (especially around 950MHz) at
the cost of 1.5dB degradation of the noise fl oor at P
RF
=
4dBm. Harmonics present on the LO signal can degrade the
image rejection because they can introduce a small excess
phase shift in the internal phase splitter. For the second (at
1.7GHz) and third harmonics (at 2.55GHz) at –20dBc, the
resulting signal at the image frequency is about –56dBc
or lower, corresponding to an excess phase shift of much
less than 1 degree. For the second and third LO harmonics
at –10dBc, the introduced signal at the image frequency is
about –47dBc. Higher harmonics than the third will have
less impact. The LO return loss typically will be better than
11dB over the 700MHz to 1.05GHz range. Table 1 shows
the LO port input impedance vs frequency.
Figure 4. Equivalent Circuit Schematic of the LO Input
