Semiconductor Components Industries, LLC, 2006
February, 2006 − Rev. 8
1 Publication Order Number:
MC10H121/D
MC10H121
4−Wide OR−AND/OR−AND
Gate
Description
The MC10H121 is a basic logic building block providing the
simultaneous OR−AND/OR−AND−Invert function, useful in data
control and digital multiplexing applications. This MECL 10H part
is a functional/pinout duplication of the standard MECL 10K family
part, with 100% improvement in propagation delay, and no increase in
power− supply current.
Features
• Propagation Delay, 1.0 ns Typical
• Power Dissipation 100 mW/Gate Typical (same as MECL 10K)
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
• Voltage Compensated
• MECL 10K Compatible
• Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
CDIP−16
L SUFFIX
CASE 620A
MARKING DIAGRAMS*
PDIP−16
P SUFFIX
CASE 648
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
ORDERING INFORMATION
SOEIAJ−16
CASE 966
16
1
16
1
MC10H121P
AWLYYWWG
1
16
MC10H121L
AWLYYWW
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G= Pb−Free Package
10H121
ALYWG
PLLC−20
FN SUFFIX
CASE 775
20
1
10H121G
AWLYYWW
120