74HC_HCT165_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 17 July 2012 10 of 21
NXP Semiconductors
74HC165-Q100; 74HCT165-Q100
8-bit parallel-in/serial out shift register
74HCT165-Q100
t
pd
propagation
delay
CE, CP to Q7, Q7;
see Figure 7
[1]
V
CC
= 4.5 V - 17 34 - 43 - 51 ns
V
CC
= 5.0 V; C
L
=15pF-14---- - ns
PL
to Q7, Q7; see Figure 8
V
CC
= 4.5 V - 20 40 - 50 - 60 ns
V
CC
= 5.0 V; C
L
=15pF-17---- - ns
D7 to Q7, Q
7; see Figure 9
V
CC
= 4.5 V - 14 28 - 35 - 42 ns
V
CC
= 5.0 V; C
L
=15pF-11---- - ns
t
t
transition
time
Q7, Q7 output; see Figure 7
[2]
V
CC
= 4.5 V - 7 15 - 19 - 22 ns
t
W
pulse width CP input; see Figure 7
V
CC
= 4.5 V 16 6 - 20 - 24 - ns
PL
input; see Figure 8
V
CC
= 4.5 V 20 9 - 25 - 30 - ns
t
rec
recovery time PL to CP, CE; see Figure 8
V
CC
= 4.5 V 20 8 - 25 - 30 - ns
t
su
set-up time DS to CP, CE; see Figure 10
V
CC
= 4.5 V 20 2 - 25 - 30 - ns
CE
to CP and CP to CE;
see Figure 10
V
CC
= 4.5 V 20 7 - 25 - 30 - ns
Dn to PL
; see Figure 11
V
CC
= 4.5 V 20 10 - 25 - 30 - ns
t
h
hold time DS to CP, CE and Dn to PL;
see Figure 10
V
CC
= 4.5 V 7 1- 9 - 11 - ns
CE
to CP and CP to CE;
see Figure 10
V
CC
= 4.5 V 0 7- 0 - 0 - ns
f
max
maximum
frequency
CP input; see Figure 7
V
CC
= 4.5 V 26 44 - 21 - 17 - MHz
V
CC
= 5.0 V; C
L
=15pF-48---- - MHz
Table 7. Dynamic characteristics
…continued
GND (ground = 0 V); C
L
= 50 pF unless otherwise specified; for test circuit, see Figure 12
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
