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MC74VHCT14AMEL

P1-P3P4-P6
© Semiconductor Components Industries, LLC, 2015
August, 2017 − Rev. 8
1 Publication Order Number:
MC74VHCT14A/D
MC74VHCT14A
Hex Schmitt Inverter
The MC74VHCT14A is an advanced high speed CMOS Schmitt
inverter fabricated with silicon gate CMOS technology. It achieves
high speed operation similar to equivalent Bipolar Schottky TTL
while maintaining CMOS low power dissipation.
Pin configuration and function are the same as the
MC74VHCT04A, but the inputs have hysteresis and, with its Schmitt
trigger function, the VHCT14A can be used as a line receiver which
will receive slow input signals.
The VHCT inputs are compatible with TTL levels. This device can
be used as a level converter for interfacing 3.3 V to 5.0 V, because it
has full 5.0 V CMOS level output swings.
The VHCT14A input structures provide protection when voltages
between 0 V and 5.5 V are applied, regardless of the supply voltage.
The output structures also provide protection when V
CC
= 0 V. These
input and output structures help prevent device destruction caused by
supply voltage − input/output voltage mismatch, battery backup, hot
insertion, etc.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
• High Speed: t
PD
= 5.5 ns (Typ) at V
CC
= 5.0 V
• Low Power Dissipation: I
CC
= 2.0 mA (Max) at T
A
= 25°C
• TTL−Compatible Inputs: V
IL
= 0.8 V; V
IH
= 2.0 V
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2.0 V to 5.5 V Operating Range
• Low Noise: V
OLP
= 0.8 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: 60 FETs or 15 Equivalent Gates
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
www.onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
L
H
FUNCTION TABLE
Inputs Outputs
A
H
L
Y
MARKING
DIAGRAMS
TSSOP−14
DT SUFFIX
CASE 948G
1
SOIC−14
D SUFFIX
CASE 751A
1
A = Assembly Location
WL, L = Wafer Lot
Y, YY = Year
WW, W = Work Week
G or G = Pb−Free Package
VHCT14AG
AWLYWW
1
14
VHCT
14A
ALYWG
G
1
14
(Note: Microdot may be in either location)
MC74VHCT14A
www.onsemi.com
2
Figure 1. Logic Diagram
Y1A1
A2
A3
A4
A5
A6
Y2
Y3
Y4
Y5
Y6
1
3
5
9
11
13
2
4
6
8
10
12
Y = A
1314 12 11 10 9 8
21 34567
V
CC
A6 Y6 A5 Y5 A4 Y4
A1 Y1 A2 Y2 A3 Y3 GND
Pinout: 14−Lead Packages (Top View)
MAXIMUM RATINGS
Parameter Symbol Value Unit
DC Supply Voltage V
CC
−0.5 to +7.0 V
DC Input Voltage V
IN
−0.5 to +7.0 V
DC Output Voltage Output in HIGH or LOW State (Note 1) V
OUT
−0.5 to V
CC
+0.5 V V
V
CC
= 0 V V
OUT
−0.5 to 7.0 V
DC Input Diode Current I
IK
−20 mA
DC Output Diode Current I
OK
$20 mA
DC Output Source/Sink Current I
O
$25 mA
DC Supply Current per Supply Pin I
CC
$50 mA
DC Ground Current per Ground Pin I
GND
$50 mA
Storage Temperature Range T
STG
−65 to +150 °C
Lead Temperature, 1 mm from Case for 10 Seconds T
L
260 °C
Junction Temperature under Bias T
J
+150 °C
Thermal Resistance SOIC
TSSOP
q
JA
125
170
°C/W
Power Dissipation in Still Air SOIC
TSSOP
P
D
500
450
mW
ESD Withstand Voltage Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
V
ESD
>2000
>200
2000
V
Latchup Performance Above V
CC
and Below GND at 85°C (Note 5) I
Latchup
$300 mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. I
O
absolute maximum rating must be observed.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
MC74VHCT14A
www.onsemi.com
3
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Min Max Unit
Supply Voltage V
CC
4.5 5.5 V
Input Voltage V
I
0 5.5 V
Output Voltage (Note 6) V
O
0 V
CC
V
V
CC
= 0 V V
O
0 5.5 V
Operating Free−Air Temperature T
A
−55 +125 °C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
6. I
O
absolute maximum rating must be observed.
DC ELECTRICAL CHARACTERISTICS
Parameter Test Conditions
V
CC
V
T
A
= 25°C T
A
≤ 85°C T
A
≤ 125°C
Uni
t
Symbol Min Typ Max Min Max Min Max
Positive Threshold Voltage V
T+
4.5
5.5
1.9
2.1
1.9
2.1
1.9
2.1
V
Negative Threshold Voltage V
T−
4.5
5.5
0.5
0.6
0.5
0.6
0.5
0.6
V
Hysteresis Voltage V
H
4.5
5.5
0.40
0.40
1.40
1.50
0.40
0.40
1.40
1.50
0.40
0.40
1.40
1.50
V
Minimum High−Level Output Voltage
I
OH
= −50 mA
V
IN
= V
IH
or V
IL
I
OH
= −50 mA
V
OH
4.5 4.4 4.5 4.4 4.4
V
I
OH
= −8.0 mA 5.5 3.94 3.80 3.66
Maximum Low−Level Output Voltage
V
IN
= V
IH
or V
IL
I
OL
= 50 mA
V
OL
4.5 0.0 0.1 0.1 0.1
V
I
OL
= 8.0 mA 5.5 0.36 0.44 0.52
Maximum Input Leakage Current V
IN
= 5.5 V or GND I
IN
0 to 5.5 ±0.1 ±1.0 ±1.0
mA
Maximum Quiescent Supply Current V
IN
= V
CC
or GND I
CC
5.5 2.0 20 40
mA
Quiescent Supply Current Input: V
IN
= 3.4 V I
CCT
5.5 1.35 1.50 1.65 mA
Output Leakage Current V
OUT
= 5.5 V I
OFF
0.0 0.5 5.0 10
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
AC ELECTRICAL CHARACTERISTICS (Input t
r
= t
f
= 3.0 ns)
Parameter Test Conditions Symbol
T
A
= 25°C T
A
≤ 85°C T
A
≤ 125°C
Uni
t
Min Typ Max Min Max Min Max
Maximum Propagation Delay, A to Y V
CC
= 5.0 ± 0.5 V
C
L
= 15 pF
C
L
= 50 pF
t
PLH
,
t
PHL
5.5
7.0
7.6
9.6
1.0
1.0
9.0
11.0
1.0
1.0
11.5
13.5
ns
Maximum Input Capacitance C
IN
2.0 10 10 10 pF
Power Dissipation Capacitance
(Note 7)
C
PD
Typical @ 25°C, V
CC
= 5.0 V
pF
11
7. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
/6 (per buffer). C
PD
is used to determine the
no−load dynamic power consumption; P
D
= C
PD
V
CC
2
f
in
+ I
CC
V
CC
.
NOISE CHARACTERISTICS (Input t
r
= t
f
= 3.0 ns, C
L
= 50 pF, V
CC
= 5.0 V)
Characteristic
Symbol
T
A
= 25°C
Uni
t
Typ Max
Quiet Output Maximum Dynamic V
OL
V
OLP
0.8 1.0 V
Quiet Output Minimum Dynamic V
OL
V
OLV
−0.8 −1.0 V
Minimum High Level Dynamic Input Voltage V
IHD
2.0 V
Maximum Low Level Dynamic Input Voltage V
ILD
0.8 V
P1-P3P4-P6

MC74VHCT14AMEL

Mfr. #:
Buy MC74VHCT14AMEL
Manufacturer:
ON Semiconductor
Description:
Inverters 5V CMOS Hex
Lifecycle:
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