DG441CY

DG441/DG442
Improved, Quad, SPST Analog Switches
_______________________________________________________________________________________ 7
t
OFF
0.8 x V
OUT
V
OUT
0.8 x V
OUT
t
f
< 20ns
t
r
< 20ns
50%
0V
0V
+3V
SWITCH
OUTPUT
LOGIC INPUT WAVEFORM IS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
t
ON
SWITCH
INPUT
LOGIC
INPUT
+3V
IN
D
+15V
V+
V-
-15V
R
L
35pF
V
OUT
S
C
L
(INCLUDES FIXTURE AND STRAY CAPACITANCE)
GND
REPEAT TEST FOR CHANNELS 2, 3, AND 4.
V
OUT
= V
D
R
L
R
L
+ r
DS(ON)
LOGIC
INPUT
V
D
DG441
DG442
( )
ΔV
OUT
OFFONOFF
V
OUT
IN
IN
OFF OFFON
Q = ΔV
OUT
× C
L
-15V
V-
V+
INGND
S
+15V
R
GEN
V
GEN
V
IN
= +3V
C
L
1nF
V
OUT
D
DG441
DG442
DG441
DG442
Figure 2. Switching Time
Figure 3. Charge Injection
NETWORK
ANALYZER
SIGNAL
GENERATOR
R
GEN
= 50Ω
S
D
GND
R
L
10dBm
10nF
V+
+15V
IN
0.8V or 2.4V
V-
-15V
10nF
DG441
DG442
NETWORK
ANALYZER
SIGNAL
GENERATOR
R
GEN
= 50Ω
0.8V or 2.4V
S
IN1
D
GND
R
L
10dBm
10nF
V+
+15V
D
IN2
S
0.8V or 2.4V
50Ω
V-
-15V
10nF
DG441
DG442
Figure 4. Off-Isolation Rejection Ratio Figure 5. Crosstalk (repeat for channels 3 and 4)
______________________________________________Timing Diagrams/Test Circuits
DG441/DG442
Improved, Quad, SPST Analog Switches
8 _______________________________________________________________________________________
CAPACITANCE
METER
D
S
GND
10nF
+15V
IN
0.8V or 2.4V
V-
-15V
10nF
+V
f = 1MHz
Timing Diagrams/
Test Circuits (continued)
Figure 6. Source/Drain-On/Off Capacitance
Ordering Information (continued)
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
16 Plastic DIP P16-1
21-0043
16 Narrow SO S16-3
21-0041
16 CERDIP J16-3
21-0045
16 Thin QFN-EP (5mm x 5mm) T1655-2
21-0140
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.
Note: Devices are available in both leaded and lead(Pb)-free
packaging. Specify lead-free by adding the + symbol at the
end of the part number when ordering.
*
Contact factory for dice specifications.
**
EP = Exposed pad.
***
Contact factory for availability and processing to MIL-STD-
883B. Not available in lead-free.
PART TEMP RANGE PIN-PACKAGE
DG441DK -40°C to +85°C 16 CERDIP
DG441ETE -40°C to +85°C 16 Thin QFN-EP**
DG441AK -55°C to +125°C 16 CERDIP***
DG441MY/PR -55°C to +125°C 16 Narrow SO
DG442CJ 0°C to +70°C 16 Plastic DIP
DG442CY 0°C to +70°C 16 Narrow SO
DG442C/D 0°C to +70°C Dice*
DG442DJ -40°C to +85°C 16 Plastic DIP
DG442DY -40°C to +85°C 16 Narrow SO
DG442DK -40°C to +85°C 16 CERDIP
DG442ETE -40°C to +85°C 16 Thin QFN-EP**
DG442AK -55°C to +125°C 16 CERDIP***
DG442MY/PR -55°C to +125°C 16 Narrow SO
DG441/DG442
Improved, Quad, SPST Analog Switches
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________
9
© 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE
DESCRIPTION
PAGES
CHANGED
5 5/09 Added ruggedized plastic. 1, 2, 6, 8

DG441CY

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog Switch ICs Improved, Quad, SPST Analog Switches
Lifecycle:
New from this manufacturer.
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