FAN5059MX Datasheet FAN5059MX, FAN5059M | P13-P15

PRODUCT SPECIFICATION FAN5059

REV. 1.0.4 8/14/03 13

The softstart ramp begins at T(0) where UVLO is released.

During the period of t

the softstart pin ramps but the PWM

switching is not enabled and thus the duty cycle is zero

(D=0) and the output voltage is zero. During t

the duty

cycle increased progressively from 0 to 1. This period is

where the output voltage ramps, dependent on output capaci-

tance and output load. If the duration of t

is long enough

the output voltage will fully ramp to the point of regulation.

During t

the softstart pin continues to ramp but without

effect on the output voltage.

NOTE: If a very large output capacitor bank is used it may

be required to use a larger C

to ensure a full output voltage

ramp within t

Over-Voltage Protection

The FAN5059 constantly monitors the output voltage for pro-

tection against over-voltage conditions. If the voltage at the

VFB pin exceeds the selected program voltage, an over-volt-

age condition is assumed and the FAN5059 disables the out-

put drive signal to the external high-side MOSFET. The DC-

DC converter returns to normal operation after the output

voltage returns to normal levels.

Oscillator

The FAN5059 oscillator section uses a ﬁxed frequency of

operation of 300KHz.

Design Considerations and Component

Selection

Additional information on design and component selection

may be found in Fairchild’s Application Note 57.

MOSFET Selection

This application requires N-channel Logic Level Enhancement

Mode Field Effect Transistors. Desired characteristics are as

follows:

•Low Static Drain-Source On-Resistance, R

DS,ON

< 20mΩ

(lower is better)

•Low gate drive voltage, V

= 4.5V rated

•Power package with low Thermal Resistance

• Drain-Source voltage rating > 15V.

The on-resistance (R

DS,ON)

is the primary parameter for

MOSFET selection. The on-resistance determines the power

dissipation within the MOSFET and therefore signiﬁcantly

affects the efﬁciency of the DC-DC Converter. For details

and a spreadsheet on MOSFET selection, refer to Applica-

tions Bulletin AB-8.

Inductor Selection

Choosing the value of the inductor is a tradeoff between

allowable ripple voltage and required transient response. The

system designer can choose any value within the allowed

minimum to maximum range in order to either minimize ripple

or maximize transient performance. The ﬁrst order equation

(close approximation) for minimum inductance is:

where:

= Input Power Supply

out

= Output Voltage

f = DC/DC converter switching frequency

ESR = Equivalent series resistance of all output capacitors in

parallel

ripple

= Maximum peak to peak output ripple voltage budget.

The ﬁrst order equation for maximum allowed inductance is:

where:

= The total output capacitance

= Maximum to minimum load transient current

= The output voltage tolerance budget allocated to load

transient

= Maximum duty cycle for the DC/DC converter (usually

95%).

Some margin should be maintained away from both L

min

and

max

. Adding margin by increasing L almost always adds

expense since all the variables are predetermined by system

performance except for C

, which must be increased to

increase L. Adding margin by decreasing L can be done by

purchasing capacitors with lower ESR. The FAN5059

provides signiﬁcant cost savings for the newer CPU systems

that typically run at high supply current.

FAN5059 Short Circuit Current Characteristics

The FAN5059 protects against output short circuit on the

core supply by turning off both the high-side and low-side

MOSFETs and resetting softstart. The short circuit limit is

set with the R

resistor, as given by the formula

Note: R

cannot exceed 10.8K. If a higher current is required

than 10.8K allows, a FET with lower R

DSon

must be used.

2.75V

2.25V

T(0)

min

– V

out

)

out

ESR

ripple

max

– V

out

) D

DS, on

Detect

FAN5059 PRODUCT SPECIFICATION

14 REV. 1.0.4 8/14/03

with I

Detect

≈ 50µA, I

is the desired current limit, and

DS,on

the high-side MOSFET’s on resistance. Remember to

make the R

large enough to include the effects of initial tol-

erance and temperature variation on the MOSFET’s R

DS,on

Alternately, use of a sense resistor in series with the source

of the MOSFET eliminates this source of inaccuracy in the

current limit.

As an example, Figure 4 shows the typical characteristic of

the DC-DC converter circuit with an FDB6030L high-side

MOSFET (R

= 20mΩ maximum at 25°C * 1.25 at 75°C =

25mΩ) and a 8.2KΩ R

Figure 4. FAN5059 Short Circuit Characteristic

The converter exhibits a normal load regulation characteristic

until the voltage across the MOSFET exceeds the internal

short circuit threshold of 50µA * 8.2KΩ = 410mV, which

occurs at 410mV/25mΩ = 16.4A. (Note that this current limit

level can be as high as 410mV/15mΩ = 27A, if the MOSFET

has typical R

DS,on

rather than maximum, and is at 25°C).

At this point, the internal comparator trips and signals the con-

troller to discharge the softstart capacitor. This causes a drastic

reduction in the output voltage as the load regulation collapses

into the short circuit control mode. With a 40mΩ output short,

the voltage is reduced to 16.4A * 40mΩ = 650mV. The output

voltage does not return to its nominal value until the output

current is reduced to a value within the safe operating ranges

for the DC-DC converter.

If any of the linear regulator outputs are loaded heavily

enough that their output voltage drops below 80% of nominal

for >30µsec, all FAN5059 outputs, including the switcher, are

shut off and remain off until power is recycled.

Schottky Diode Selection

The application circuit of Figure 1 shows a Schottky diode,

D1, which is used as a free-wheeling diode to assure that the

body-diode in Q2 does not conduct when the upper MOSFET

is turning off and the lower MOSFET is turning on. It is

undesirable for this diode to conduct because its high forward

voltage drop and long reverse recovery time degrades efﬁciency,

and so the Schottky provides a shunt path for the current.

Since this time duration is very short, the selection criterion

for the diode is that the forward voltage of the Schottky at

the output current should be less than the forward voltage of

the MOSFET’s body diode.

Output Filter Capacitors

The output bulk capacitors of a converter help determine its

output ripple voltage and its transient response. It has already

been seen in the section on selecting an inductor that the ESR

helps set the minimum inductance, and the capacitance value

helps set the maximum inductance. For most converters,

however, the number of capacitors required is determined by

the transient response and the output ripple voltage, and these

are determined by the ESR and not the capacitance value.

That is, in order to achieve the necessary ESR to meet the

transient and ripple requirements, the capacitance value

required is already very large.

The most commonly used choice for output bulk capacitors is

aluminum electrolytics, because of their low cost and low ESR.

The only type of aluminum capacitor used should be those that

have an ESR rated at 100kHz. Consult Application Bulletin

AB-14 for detailed information on output capacitor selection.

The output capacitance should also include a number of

small value ceramic capacitors placed as close as possible to

the processor; 0.1µF and 0.01µF are recommended values.

Input Filter

The DC-DC converter design may include an input inductor

between the system +5V supply and the converter input as

shown in Figure 5. This inductor serves to isolate the +5V

supply from the noise in the switching portion of the DC-DC

converter, and to limit the inrush current into the input capac-

itors during power up. A value of 2.5µH is recommended.

It is necessary to have some low ESR aluminum electrolytic

capacitors at the input to the converter. These capacitors

deliver current when the high side MOSFET switches on.

Figure 5 shows 3 x 1000µF, but the exact number required

will vary with the speed and type of the processor. For the

top speed Katmai and Coppermine, the capacitors should be

rated to take 9A and 6A of ripple current respectively.

Capacitor ripple current rating is a function of temperature,

and so the manufacturer should be contacted to ﬁnd out the

ripple current rating at the expected operational temperature.

For details on the design of an input ﬁlter, refer to Applica-

tions Bulletin AB-15.

Figure 5. Input Filter

OUT

(V)

0 5 10 15 20 25

3.5

3.0

2.5

2.0

1.5

1.0

0.5

CPU Output Voltage vs. Output Current

2.5µH

0.1µF

1000µF, 10V

Electrolytic

Vin

PRODUCT SPECIFICATION FAN5059

REV. 1.0.4 8/14/03 15

Programmable Active Droop

™

The FAN5059 includes Programmable Active Droop

™

: as

the output current increases, the output voltage drops, and

the amount of this drop is user adjustable. This is done in

order to allow maximum headroom for transient response of

the converter. The current is typically sensed by measuring

the voltage across the R

DS,on

of the high-side MOSFET dur-

ing its on time, as shown in Figure 1.

To program the amount of droop, use the formula

where I

max

is the current at which the droop occurs, and R

sense

is the resistance of the current sensor, either the source resistor

or the high-side MOSFET’s on-resistance. For example, to

get 30mV of droop with a maximum output current of 12.5A

and a 10mΩ sense resistor, use R

= 14.4KΩ * 12.5A * 10mΩ/

(30mV * 18) = 3.33KΩ. Further details on use of the

Programmable Active Droop

™

may be found in Applications

Bulletin AB-24.

Remote Sense

The FAN5059 offers remote sense of the output voltage to

minimize the output capacitor requirements of the converter.

It is highly recommended that the remote sense pin, Pin 20,

be tied directly to the processor power pins, so that the

effects of power plane impedance are eliminated. Further

details on use of the remote sense feature of the FAN5059

may be found in Applications Bulletin AB-24.

Adjusting the Linear Regulators’ Output Voltages

Any or all of the linear regulators’ outputs may be adjusted

high to compensate for voltage drop along traces, as shown

in Figure 6.

Figure 6. Adjusting the Output Voltage of the Linear

Regulator

The resistor value should be chosen as

Note: See Note 4 in Electrical Speciﬁcations Table.

For example, to get the V

voltage to be 1.55V instead of

1.50V, use R = 10KΩ * [(1.55/1.50) – 1] = 333Ω.

Using the FAN5059 for Vnorthbridge = 1.8V

In some motherboards, Intel requires that the AGP power can not

be greater than 2.2V while the chipset voltage (Vnorthbridge =

1.8V) is less than 1.0V. The FAN5059 can accomplish this by

using the VTT regulator to generate Vnorthbridge. Use the circuit

in Figure 6 with R = 2KΩ. Since the linear regulators on the

FAN5059 all rise proportionally to one another, when Vnorth-

bridge = 1.0V, Vagp = 1.8V, meeting the Intel requirement.

PCB Layout Guidelines

• Placement of the MOSFETs relative to the FAN5059 is

critical. Place the MOSFETs such that the trace length of

the HIDRV and LODRV pins of the FAN5059 to the FET

gates is minimized. A long lead length on these pins will

cause high amounts of ringing due to the inductance of the

trace and the gate capacitance of the FET. This noise radiates

throughout the board, and, because it is switching at such

a high voltage and frequency, it is very difﬁcult to suppress.

• In general, all of the noisy switching lines should be kept

away from the quiet analog section of the FAN5059. That

is, traces that connect to pins 1, 2, 23, and 24 (HIDRV, SW,

LODRV and VCCP) should be kept far away from the

traces that connect to pins 3, 20 and 21.

• Place the 0.1µF decoupling capacitors as close to the

FAN5059 pins as possible. Extra lead length on these

reduces their ability to suppress noise.

• Each VCC and GND pin should have its own via to the

appropriate plane. This helps provide isolation between pins.

• Place the MOSFETs, inductor, and Schottky as close

together as possible for the same reasons as in the ﬁrst

bullet above. Place the input bulk capacitors as close to

the drains of the high side MOSFETs as possible. In

addition, placement of a 0.1µF decoupling cap right on the

drain of each high side MOSFET helps to suppress some

of the high frequency switching noise on the input of the

DC-DC converter.

• Place the output bulk capacitors as close to the CPU as

possible to optimize their ability to supply instantaneous

current to the load in the event of a current transient.

Additional space between the output capacitors and the

CPU will allow the parasitic resistance of the board traces

to degrade the DC-DC converter’s performance under

severe load transient conditions, causing higher voltage

deviation. For more detailed information regarding

capacitor placement, refer to Application Bulletin AB-5.

•A PC Board Layout Checklist is available from Fairchild

Applications. Ask for Application Bulletin AB-11.

Additional Information

For additional information contact Fairchild Semiconductor at

http://www.fairchildsemi.com/cf/tsg.htm or contact an autho-

rized representative in your area.

14.4KΩ *I

max

sense

Droop

*18

VFB

VGATE

VOUT

10KΩ

R 10KΩ*–1

out

nom

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18

FAN5059MX

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