AD7150
Rev. 0 | Page 2 of 28
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Specifications .................................................................. 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
Architecture and Main Features ................................................... 10
Capacitance-to-Digital Converter............................................ 10
CAPDAC ..................................................................................... 10
Comparator and Threshold Modes.......................................... 11
Adaptive Threshold.................................................................... 11
Data Average ............................................................................... 11
Sensitivity..................................................................................... 12
Hysteresis..................................................................................... 12
Timeout........................................................................................ 12
AutoCAPDAC Adjustment....................................................... 13
Power-Down Timer ................................................................... 13
Power Supply Monitor ............................................................... 13
Register Descriptions ..................................................................... 14
Status Register............................................................................. 15
Data Registers ............................................................................. 16
Average Registers........................................................................ 16
Fixed Threshold Registers......................................................... 16
Sensitivity Registers ................................................................... 16
Timeout Registers....................................................................... 17
Setup Registers............................................................................ 18
Configuration Register .............................................................. 19
Power-Down Timer Register .................................................... 20
CAPDAC Registers .................................................................... 20
Serial Number Register.............................................................. 20
Chip ID Register......................................................................... 20
Serial Interface ................................................................................ 21
Read Operation........................................................................... 21
Write Operation.......................................................................... 21
AD7150 Reset ............................................................................. 22
General Call ................................................................................ 22
Hardware Design Considerations ................................................ 23
Overview ..................................................................................... 23
Parasitic Capacitance to Ground.............................................. 23
Parasitic Resistance to Ground................................................. 23
Parasitic Parallel Resistance ...................................................... 23
Parasitic Serial Resistance ......................................................... 24
Input Overvoltage Protection................................................... 24
Input EMC Protection ............................................................... 24
Power Supply Decoupling and Filtering.................................. 24
Application Examples................................................................ 25
Outline Dimensions ....................................................................... 26
Ordering Guide .......................................................................... 26
REVISION HISTORY
11/07—Revision 0: Initial Version