LT3514
10
3514fa
For more information www.linear.com/LT3514
BLOCK DIAGRAM
3514 BD
V
IN
Σ
S
R NQ
S
R NQ
Σ
SYNC
DETECT
CLK1
CLK2
OSC
FREQUENCY
TO CURRENT
TO CH3, CH4
STARTUP/SHUTDOWN
THERMAL SHUTDOWN
0.4V
1µA
1.44V
ON
REF
PRECISION UVLO
V
IN
EN/UVLO
LOCK
1SHOT
SLOPE
SLOPE
1SHOT
SKY
5V
BOOST ERROR AMP
0.7V
BOOST SWITCH AND DRIVE
SW5
SW1
DA1
PG
FB1
SKY
V
IN
PGOOD
OUT1
COMPARATORS FROM OTHER CHANNELS
FB1
0.72V
CURRENT LIMIT FOLDBACK
0.8V
0.7V
SKYBAD
0.8V
BOOST REGULATOR
Q5
D5
Q1
SWITCH AND DRIVE
ONE OF THREE BUCK REGULATORS SHOWN
POWER GOOD LOGIC
RT/SYNC RUN/SS1 GND
2.2V
0.1V
1µA
SKYBAD
0
1
+
4.5V
SKYBAD
SKY
V
IN
LT3514
11
3514fa
For more information www.linear.com/LT3514
OPERATION
A comparator starts the reference when the EN/UVLO pin
rises above the 1.44V rising threshold. Other comparators
prevent switching when the input voltage is below 2.9V or
the die temperature is above 175°C. When the EN/UVLO
is above 1.44V, the input voltage is above 3.2V, and the
temperature is below 175°C, the boost regulator begins
switching and charges the SKY capacitor to 4.85V above
V
IN
. When the SKY voltage is less than 4.5V above V
IN
,
the RUN/SS pins and V
C
nodes are actively pulled low to
prevent the buck regulators from switching.
The boost regulator (Channel 5) consists of an internal
0.4A power switch (Q5), an internal power Schottky diode
(D5), and the necessary logic and other control circuitry
to drive the switch. The switch current is monitored to
enforce cycle-by-cycle current limit. The diode current
is monitored to prevent inductor current runaway during
transient conditions. An error amplifier servos the SKY
voltage to 4.85V above V
IN
. A comparator detects when
the SKY voltage is 4.5V above V
IN
and allows the buck
regulators to begin switching.
The oscillator produces two antiphase clock signals running
at 50% duty cycle. Channel 5 runs antiphase to Channels
3 and 4. The oscillator can be programmed by connecting
a single resistor from RT/SYNC to ground, or by applying
an external clock signal to RT/SYNC. A sync detect circuit
distinguishes between the type of input. Tying a resistor
to GND directly sets the bias current of the oscillator. The
sync signal is converted to a current to set the bias cur
-
rent of the oscillator.
The oscillator enables an R
S
flip-flop, turning on the power
switch Q1. An amplifier and comparator monitor the current
flowing between the V
IN
and SW pins, turning the switch
off when this current reaches a level determined by the
voltage at the V
C
node. A second comparator enforces
a catch diode current limit to prevent inductor current
runaway during transient conditions. An error amplifier
measures the output voltage through an external resistor
tied to the FB pin and servos the V
C
node. If the error
amplifiers output increases, more current is delivered
to the output; if it decreases, less current is delivered. A
clamp on the V
C
pin provides switch current limit. Each
buck regulator switch driver operates by drawing current
from the SKY pin. Regulating the SKY pin to 4.85V above
the V
IN
pin voltage is necessary to fully saturate the bipolar
power switch for efficient operation.
Soft-start is implemented by generating a voltage ramp at
the RUN/SS pin. An internal 1.3µA current source pulls the
RUN/SS pin up to 2.1V. Connecting a capacitor from the
RUN/SS pin to ground programs the rate of the voltage
ramp on the RUN/SS pin. A voltage follower circuit with a
0.1V offset connected from the RUN/SS pin to the RAMP
node prevents switching until the voltage at the RUN/SS
pin increases above 0.1V. When the voltage at the RAMP
node is less than 0.9V, the error amplifier servos the FB
voltage to the RAMP node voltage. When the RAMP node
voltage increases above 0.9V, then the error amplifier ser
-
vos the FB voltage to 0.8V. Additionally, a current amplifier
reduces the catch diode current limit when the FB voltage
is below 0.8V to limit the inductor current during startup.
Each channel can be placed in shutdown by pulling the
respective RUN/SS pin below 0.1V. The EN/UVLO pin can
be pulled low (below a V
BE
) to place the entire part in
shutdown, disconnecting the outputs and reducing the
input current to less than 2µA.
LT3514
12
3514fa
For more information www.linear.com/LT3514
The three step-down converters in the LT3514 are referred
to as channels 1, 3, and 4, while the boost converter is
referred to as channel 5. There is no channel 2. This nam
-
ing convention is intended to maintain consistency and
limited pin compatibility with the LT3504, a four channel
step-down converter. Essentially, two 1A converters (chan
-
nels 2 and 3) of the LT3504 were combined to make the
2A converter (channel 3) of the LT3514.
FB Resistor Network
The output voltage is programmed with a resistor divider
connected from the output and the FB pin. Choose the 1%
resistor according to:
R1= R2
V
OUT
0.8V
1
A good value for R2 is 10.2kΩ, R2 should not exceed
20kΩ to avoid bias current error.
Input Voltage Range
The input voltage range for LT3514 applications depends
on the output voltage and on the absolute maximum rat
-
ing of the V
IN
pin.
The minimum input voltage to regulate the output gener-
ally has to be at least 400mV greater than the greatest
programmed output voltage. The only exception is when
the largest programmed output voltage is less than 2.8V
.
In this case the minimum input voltage is 3.2V
.
The absolute maximum input voltage of the LT3514 is
40V and the part will regulate output voltages as long
as the input voltage remains less than or equal to 40V.
However for constant-frequency operation (no pulse-
skipping) the maximum input voltage is determined by
the minimum on-time of the LT3514 and the programmed
switching frequency. The minimum on-time is the shortest
period of time that it takes the switch to turn on and off.
Therefore the maximum input voltage to operate without
pulse-skipping is:
V
IN(PS)
= [ (V
OUT
+ V
D
)/(f
SW
• t
ON(MIN)
) ] + V
SW
– V
D
APPLICATIONS INFORMATION
where:
• V
IN(PS)
is the maximum input voltage to operate in
constant frequency operation without skipping pulses.
• V
OUT
is the programmed output voltage
• V
SW
is the switch voltage drop, at I
OUT1,4
= 1A,
V
SW1,4
= 0.4V, at I
OUT3
= 2A, V
SW3
= 0.4V.
• V
D
is the catch diode forward voltage drop, for an
appropriately sized diode, V
D
= 0.4V
• f
SW
is the programmed switching frequency
• t
ON(MIN)
is the minimum on-time, worst-case over
temperature = 110ns (at T = 125°C)
At input voltages that exceed V
IN(PS)
the part will continue
to regulate the output voltage up to 40V. However the
part will skip pulses (see Figure 1) resulting in unwanted
harmonics, increased output voltage ripple, and increased
Figure 1a. The LT3514 Operating in Constant-Frequency
Operation (Below V
IN(PS)
), V
IN
= 26.5V, V
OUT
= 3.3V,
f
SW
= 2MHz, t
ON(MIN)
= 74ns at T = 25°C
Figure 1b. The LT3514 Operating in Pulse-Skipping
Mode (Above V
IN(PS)
), V
IN
= 27V, V
OUT
= 3.3V, f
SW
=
2MHz, t
ON(MIN)
= 74ns at T = 25°C
2µs/DIV
3514 F01a
I
L
0.5A/DIV
V
SW
10V/DIV
2µs/DIV
3514 F01b
I
L
0.5A/DIV
V
SW
10V/DIV

LT3514EFE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Triple Step-Down Switching Regulator with 100% Duty Cycle Operation
Lifecycle:
New from this manufacturer.
Delivery:
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