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ICL7650SCBA-1Z

P1-P3P4-P6P7-P9P10-P12P13-P13
1
®
FN2920.10
ICL7650S
2MHz, Super Chopper-Stabilized
Operational Amplifier
The ICL7650S Super Chopper-Stabilized Amplifier offers
exceptionally low input offset voltage and is extremely stable
with respect to time and temperature. It is a direct
replacement for the industry-standard ICL7650 offering
improved input offset voltage, lower input offset voltage
temperature coefficient, reduced input bias current, and
wider common mode voltage range. All improvements are
highlighted in bold italics in the Electrical Characteristics
section. Critical parameters are guaranteed over the
entire commercial temperature range.
Intersil’s unique CMOS chopper-stabilized amplifier circuitry
is user-transparent, virtually eliminating the traditional
chopper amplifier problems of intermodulation effects,
chopping spikes, and overrange lockup.
The chopper amplifier achieves its low offset by comparing
the inverting and non-inverting input voltages in a nulling
amplifier, nulled by alternate clock phases. Two external
capacitors are required to store the correcting potentials on
the two amplifier nulling inputs; these are the only external
components necessary.
The clock oscillator and all the other control circuitry is
entirely self-contained. However the 14 lead version includes
a provision for the use of an external clock, if required for a
particular application. In addition, the ICL7650S is internally
compensated for unity-gain operation.
Features
• Guaranteed Max Input Offset Voltage for All Temperature
Ranges
• Low Long-Term and Temperature Drifts of Input Offset
Voltage
• Guaranteed Max Input Bias Current . . . . . . . . . . . . .10pA
• Extremely Wide Common Mode
Voltage Range. . . . . . . . . . . . . . . . . . . . . . . +3.5V to -5V
• Reduced Supply Current . . . . . . . . . . . . . . . . . . . . . . 2mA
• Guaranteed Minimum Output Source/Sink Current
• Extremely High Gain . . . . . . . . . . . . . . . . . . . . . . . .150dB
• Extremely High CMRR and PSRR. . . . . . . . . . . . . .140dB
• High Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . .2.5V/μs
• Wide Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2MHz
• Unity-Gain Compensated
• Clamp Circuit to Avoid Overload Recovery Problems and
Allow Comparator Use
• Extremely Low Chopping Spikes at Input and Output
• Improved, Direct Replacement for Industry-Standard
ICL7650 and other Second-Source Parts
• Pb-Free Plus Anneal Available (RoHS Compliant)
Ordering Information
PART
NUMBER
PART
MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. #
ICL7650SCBA-1 7650S CBA-1 0 to +70 8 Ld SOIC M8.15
ICL7650SCBA-1T 7650S CBA-1 0 to +70 8 Ld SOIC (Tape and Reel) M8.15
ICL7650SCBA-1Z (Note) 7650S CBA-1Z 0 to +70 8 Ld SOIC M8.15
ICL7650SCBA-1ZT (Note) 7650S CBA-1Z 0 to +70 8 Ld SOIC (Tape and Reel) M8.15
ICL7650SCPA-1 7650S CPA-1 0 to +70 8 Ld PDIP E8.3
ICL7650SCPA-1Z (Note) 7650S CPA-1Z 0 to +70 8 Ld PDIP* (Pb-free) E8.3
ICL7650SCPD ICL7650SCPD 0 to +70 14 Ld PDIP E14.3
ICL7650SCPDZ 7650SCPDZ 0 to +70 14 Ld PDIP* (Pb-free) E14.3
*Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Data Sheet April 12, 2007
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002-2005, 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
2
FN2920.10
April 12, 2007
Pinouts
ICL7650S
(8 LD PDIP, SOIC)
TOP VIEW
C
EXTA
-IN
+IN
V-
1
2
3
4
8
7
6
5
C
EXTB
V+
OUTPUT
C
RETN
-
+
ICL7650S
(14 PDIP)
TOP VIEW
C
EXTB
C
EXTA
NC (GUARD)
-IN
+IN
NC (GUARD)
V-
INT/EXT
EXT CLK IN
INT CLK OUT
V+
OUTPUT
OUT CLAMP
C
RETN
1
2
3
4
5
6
7
14
13
12
11
10
9
8
-
+
Functional Diagram
OSC.
MAIN
NULL
+
-
+
-
+IN
-IN
A
CAP RETURN
C
EXTA
C
EXTB
A
B
C
CLAMP
OUTPUT
N
P
INTERNAL
BIAS
A
A
B
C
INT/EXT
EXT CLK IN
CLK OUT
EXT CLK IN
A = CLK OUT
A
B
C
ICL7650S
3
FN2920.10
April 12, 2007
Absolute Maximum Ratings Thermal Information
Supply Voltage (V+ to V-). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . (V+ +0.3) to (V- -0.3)
Voltage on Oscillator Control Pins . . . . . . . . . . . . . . . . . . . . V+ to V-
Duration of Output Short Circuit. . . . . . . . . . . . . . . . . . . . . Indefinite
Current to Any Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
While Operating (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . .100μA
Operating Conditions
Temperature Range
ICL7650SC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Thermal Resistance (Typical, Note 2) θ
JA
(°C/W) θ
JC
(°C/W)
8 Lead PDIP Package* . . . . . . . . . . . . 110 N/A
14 Lead PDIP Package . . . . . . . . . . . . 90 N/A
8 Lead SOIC Package . . . . . . . . . . . . . 160 N/A
Maximum Junction Temperature (Plastic Package) . . . . . . .+150°C
Maximum Storage Temperature Range. . . . . . . . .. -55°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
*Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Limiting input current to 100μA is recommended to avoid latchup problems. Typically 1mA is safe, however this is not guaranteed.
2. θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications V
SUPPLY
= ±5V. See Test Circuit, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS
TEMP.
(°C) MIN TYP MAX UNITS
Input Offset Voltage (Note 3) V
OS
+25 - ±0.7 ±5 μV
0 to +70 - ±1 ±8 μV
Average Temperature Coefficient of
Input Offset Voltage (Note 3)
ΔV
OS
/ΔT 0 to +70 - 0.02 - μV/°C
Change in Input Offset with Time ΔV
OS
/ΔT +25 - 100 - nV/√month
Input Bias Current |I(+)|, |I(-)| I
BIAS
+25 - 4 10 pA
0 to +70 - 520pA
Input Offset Current |I(-), |I(+)| I
OS
+25 - 820pA
0 to +70 - 10 40 pA
Input Resistance R
IN
+25 - 10
12
- Ω
Large Signal Voltage Gain (Note 3) A
VOL
R
L
= 10kΩ, V
O
= ±4V +25 135 150 -dB
0 to +70 130 --dB
Output Voltage Swing (Note 4) V
OUT
R
L
= 10kΩ +25 ±4.7 ±4.85 - V
R
L
= 100kΩ +25 - ±4.95 - V
Common Mode Voltage Range (Note 3) CMVR +25 -5 -5.2 to +4 3.5 V
0 to +70 -5 - 3.5 V
Common Mode Rejection Ratio
(Note 3)
CMRR CMVR = -5V to +3.5V +25 120 140 -dB
0 to +70 120 --dB
Power Supply Rejection Ratio PSRR V
S
= ±3V to ±8V +25 120 140 -dB
Input Noise Voltage e
N
R
S
= 100Ω,
f = DC to 10Hz
+25 - 2 - μV
P-P
Input Noise Current i
N
f = 10Hz +25 - 0.01 - pA/√Hz
Gain Bandwidth Product GBWP +25 - 2 - MHz
Slew Rate SR C
L
= 50pF, R
L
= 10kΩ +25 - 2.5 - V/μs
Rise Time t
R
+25 - 0.2 - μs
Overshoot OS +25 - 20 - %
Operating Supply Range V+ to V- +25 4.5 - 16 V
Supply Current I
SUPP
No Load +25 - 2 3 mA
0 to +70 - - 3.2 mA
P1-P3P4-P6P7-P9P10-P12P13-P13

ICL7650SCBA-1Z

Mfr. #:
Buy ICL7650SCBA-1Z
Manufacturer:
Renesas / Intersil
Description:
Operational Amplifiers - Op Amps OPAMP SUPER CHOPPER STABILIZED COM
Lifecycle:
New from this manufacturer.
Delivery:
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