LTC3586/LTC3586-1
31
3586fb
The compensation network depicted in Figure 9 yields the
transfer function:
V
V
R R
R R C
s
R C
s
R
C
OUT
3
3
1 3
1 3 1
1
2 2
1
1
=
+
+
+
++
( )
+
+
+
R C
s s
C C
R C C
s
R
3 3
1 2
2 1 2
1
33 3 C
A Type III compensation network attempts to introduce
a phase bump at a higher frequency than the LC double
pole. This allows the system to cross unity gain after the
LC double pole, and achieve a higher bandwidth. While
attempting to crossover after the LC double pole, the
system must still crossover before the boost right-half
plane
zero. If unity gain is
not reached sufficiently before
the right-half plane zero, then the –180° of phase from
the LC double pole combined with the 90° of phase from
the right-half plane zero will negate the phase bump of
the compensator.
The compensator zeros should be placed either before
or only slightly after the LC double pole such that their
positive phase contributions of the compensation network
offset
the –180° that occurs at
the filter double pole. If they
are placed at too low of a frequency, however, they will
introduce too much gain to the system and the crossover
frequency will be too high. The two high frequency poles
should be placed such that the system crosses unity gain
during the phase bump introduced by the zeros yet before
the boost right-half plane zero and such that the compen-
sator bandwidth is less than the bandwidth of the error
amp (typically 900kHz). If the gain of the compensation
network
is ever greater than the gain of the error amplifier,
then the error amplifier no longer acts as an ideal op amp,
another pole will be introduced where the gain crossover
occurs, and the total compensation gain will not exceed
that of the amplifier.
Recommended Type
III Compensation Components for
a 3.3V output:
R1: 324k
R
FB
: 105k
C1: 10pF
R2: 15k
C2: 330pF
R3: 121k
C3: 33pF
C
OUT
: 22µF
L
OUT
: 2.2µH
BOOST REGULATOR APPLICATIONS SECTION
Boost Regulator Inductor Selection
The boost converter is designed to work with inductors in
the range of 1µH to 5µH. For most applications a 2.2µH
inductor
will suffice. Larger
value inductors will allow
greater output current capability by reducing the inductor
ripple current. However, using too large an inductor may
push the right-half-plane zero too far inside and cause loop
instability. Lower value inductors result in higher ripple
current and improved transient response time. Refer to
Table 7 for recommended inductors.
Boost Regulator Input/Output Capacitor Selection
Low ESR (equivalent series resistance) ceramic capacitors
should be used at both the boost regulator output (V
OUT4
)
as well as the boost regulator input supply (V
IN4
). Only
X5R or X7R ceramic capacitors should be used because
they retain their capacitance over wider voltage and tem-
perature ranges than other ceramic types. At least 10µF of
output capacitance at the rated output voltage is required to
ensure stability of the boost converter output voltage over
the entire temperature and load range. Refer to Table 6 for
recommended ceramic capacitor manufacturers.
applicaTions inForMaTion
LTC3586/LTC3586-1
32
3586fb
applicaTions inForMaTion
+
ERROR
AMP
0.8V
R1
R2
3586 F08
FB3
V
C3
C
P1
V
OUT3
+
ERROR
AMP
0.8V
R1
R3
C3
R
FB
3586 F09
FB3
V
C3
C2
C1
R2
V
OUT3
Figure 8. Error Amplifier with Type I Compensation
Figure 9. Error Amplifier with Type III Compensation
V
IN4
LTC3586/
LTC3586-1
L
SW4
R1 C
OUT
C
PL
R2
3586 F10
V
OUT4
FB4
Figure 10. Boost Converter Application Circuit
Boost Regulator Output Voltage Programming
The boost regulator can be programmed for output volt-
ages up to 5V. The output voltage is programmed using a
resistor divider from the V
OUT4
pin connected to the FB4
pin such that:
V V
R
R
OUT FB4 4
1
2
1= +
where V
FB4
is 0.8V. See Figure 10.
Typical values for R1 are in the range of 40k to 1M. Too
small a resistor will result in a large quiescent current
in the feedback network and may hurt efficiency at low
current. Too large a resistor coupled with the FB4 pin ca-
pacitance will create an additional pole which may result
in loop instability. If large values are chosen for R1 and
R2, a phase-lead capacitor, C
PL
, across resistor R1 can
improve the transient response. Recommended values
for C
PL
are in the range of 2pF to 10pF.
Printed Circuit Board Layout Considerations
In order to be able to deliver maximum current under all
conditions, it is critical that the Exposed Pad on the backside
of the LTC3586/LTC3586-1 packages be soldered to the PC
board ground. Failure to make thermal contact between
the Exposed Pad on the backside of the package and the
copper board will result in higher thermal resistances.
LTC3586/LTC3586-1
33
3586fb
applicaTions inForMaTion
emissions will occur. There should be a group of vias
under the grounded backside of the package leading
directly down to an internal ground plane. To minimize
parasitic inductance, the ground plane should be on the
second layer of the PC board.
The GATE pin for the external ideal diode controller has
extremely limited drive current. Care must be taken to
minimize leakage to adjacent PC board traces. 100nA of
leakage from this pin will introduce an offset to the 15mV
ideal diode of approximately 10mV. To minimize leakage,
the trace can be guarded on the PC board by surrounding
it with V
OUT
connected metal, which should generally be
less that one volt higher than GATE.
Furthermore, due to its high frequency switching circuitry,
it is imperative that the input capacitors, inductors and
output capacitors be as close to the LTC3586/LTC3586-1
as possible and that there be an unbroken ground plane
under the LTC3586/LTC3586-1 and all of its external high
frequency components. High frequency currents, such as
the V
BUS
, V
IN1
, V
IN2
, V
IN3
, V
OUT3
, and V
OUT4
currents on
the LTC3586/LTC3586-1, tend to find their way along the
ground plane in a myriad of paths ranging from directly
back to a mirror path beneath the incident path on the
top of the board. If there are slits or cuts in the ground
plane due to other traces on that layer, the current will be
forced to go around the slits. If high frequency currents
are
not allowed to flow back through their natural least-
area path, excessive voltage will build up and radiated
3586 F11
Figure 11. Higher Frequency Ground Currents Follow Their
Incident Path. Slices in the Ground Plane Cause High Voltage
and Increased Emmisions

LTC3586EUFE#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management High Efficiency USB Power Manager + Dual Buck + Boost + Buck/Boost DC/DC
Lifecycle:
New from this manufacturer.
Delivery:
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