12
Supply Current Consumption
It should be noted that the output supply current is
speci ed under no load conditions. Additional supply
current consumption from board or components loading
can be computed based on:
I
DD
= CVF
Where I
DD
is the additional supply current consumption
per output channel, C is the load capacitance, V is the
supply voltage and F is the frequency of the signal
Bypassing and PC Board Layout
The ACML-7400 series digital isolators are extremely easy
to use. No external interface circuitry is required because
ACML-7400 series use high speed CMOS IC technology
allowing CMOS logic to be connected directly to the
inputs and outputs.
As shown in Figure 13, the only external components
required for proper operation are two bypass capacitors
for decoupling the power supply. Capacitor values should
typically be 0.1 F. For each capacitor, the total lead length
between both ends of the capacitor and the power supply
pins should be as short as possible.
GND
2
V
OE2
GND
2
V
DD1
V
DD2
GND
1
V
IN1
V
IN2
V
IN3
V
O4
V
O1
V
O2
V
O3
V
IN4
V
OE1
GND
1
1
2
3
4
16
15
14
13
Galvanic Isolation
5
6
7
8
12
11
10
9
0.1 F 0.1 F
3
4
16
15
14
13
Galvanic Isolation
5
6
7
8
12
11
10
9
1
2
3
4
16
15
14
13
Galvanic Isolation
5
6
7
8
12
11
10
9
Figure 13. Typical Schematic of ACML-7410 on PC Board
Propagation Delay, Pulse-Width Distortion and
Propagation Delay Skew
Propagation Delay is a gure of merit which describes
how quickly a logic signal propagates through a system.
The propagation delay from a low to high (t
PLH
) is the
amount of time required for an input signal to propagate
to the output, causing the output to change from low to
high. Similarly, the propagation delay from high to low
(t
PHL
) is the amount of time required for the input signal
to propagate to the output, causing the output to change
from high to low. Please see Figure 14.
Figure 14. Threshold Levels of AC Parameters
t
PLH
t
PHL
50%
V
OL
V
OH
50%
V
DD
0 V
V
IN
INPUT
OUTPUT
V
OUT
90% 90%
10%10%
