LS1012ASE7EKA

Enterprise-class
security and packet
acceleration in a
1 W typical power
microprocessor
The Layerscape LS1012A processor provides intelligent integration and extreme power
efficiency in a small 9.6 x 9.6 mm package for fanless, small form factor networking
and IoT applications.
QorIQ Layerscape
®
LS1012A
Communications Processor
TARGET APPLICATIONS
} Trust-enabled IoT gateways
} Consumer NAS
} Mobile NAS (battery powered)
} Ethernet drives for data center center storage
} Entry-level broadband Ethernet gateways
} Building and factory automation
Incorporating a 64-bit Arm
®
Cortex
®
-A53 core, the LS1012A
processor delivers CoreMark
®
performance of over 4,000
as well as hardware acceleration for packet processing and
security, and the best overall performance of any 1 W typical
power communications processor.
CORE COMPLEX
The LS1012A processor integrates a single Arm Cortex-A53
core running up to 1 GHz with ECC-protected L1 and L2
caches and incorporates the same trust architecture and
software compatibility of higher-tier Layerscape family devices.
The LS1012A processor features 32 KB of L1 instruction and
data cache and 256 KB of coherent L2 cache. In addition,
the Cortex-A53 core features the NEON™ SimD module and
dual-precision floating point unit (FPU). The memory controller
supports 16-bit DDR3L memory devices at 1 GHz.
SYSTEM INTERFACES AND NETWORKING
The LS1012A processor features a three-lane, 6 GHz multi-
protocol SerDes that provides support for high-speed
interfaces, including up to two Gigabit Ethernet ports,
DMA-controlled PCI Express
®
generation 2.0 port, and one
SATA 3.0 port. The LS1012A processor also features dual
USB controllers—one supporting SuperSpeed USB 3.0 with
integrated PHY, the other supporting USB 2.0 functions.
Additional interfaces include QuadSPI and support for
SD/MMC.
The LS1012A includes a hardware
packet forwarding engine (PFE) which
offloads processing of IP packets
from the main CPU, yielding higher
performance and lower power than
pure software processing can achieve.
The PFE is capable of 2 Gbit/s IP
forwarding even with the smallest
packets, with virtually no CPU load.
COMPLETE ENABLEMENT,
RICH ECOSYSTEM
For customer evaluation, the LS1012A
processor is supported by an evaluation
board featuring an integrated on-board
probe for further cost savings, along with
third-party platforms developed by NXP’s
embedded board solution partners.
Evaluation kits include a Linux
®
BSP with
optimized drivers to support peripherals
and a six-month evaluation license for
CodeWarrior development tools. For
quick product prototyping, NXP offers
the FRYW-LS1012A board with a built-
in mikroBUS
®
Click Module that opens
the door to easy expansion through
hundreds of powerful click modules
supporting sensors, actuators, memories
and displays.
All LS series devices are supported by
our Product Longevity Program to ensure
a stable supply of products, as well as
our extensive third-party ecosystem,
the largest and most established in the
communications market. In conjunction
with our expertise and worldwide support
infrastructure, the ecosystem helps
customers accelerate their migration
from both competitive solutions and from
legacy NXP devices, preserve investment
costs and reduce time-to-market.
LS1012A BLOCK DIAGRAM
LS1012A FEATURES
Core Complex Basic Peripherals and Interconnect Accelerators and Memory Control Networking Elements
CoreLink™ CCI-400 Coherent Interconnect
Secure Boot
QorIQ Trust Architecture
Arm TrustZone
®
Power Management
2 x SD 3.0/SDIO/eMMC
2 x I
2
C
5 x I
2
S
QSPI, 1 x SPI
2 x UART
16-bit DDR3L
Memory
Controller
128 KB
SRAM
GPIO, JTAG
Security
Engine
256 KB L2
Arm
®
Cortex
®
-A53
32 KB
L1-D
32 KB
L1-I
1 x USB 3.0 + PHY
3-Lane 6 GHz SERDES
PCIe 2.0
Packet Forwarding
Engine
SATA 3.0
GbE
GbE
1 x USB 2.0
Security Monitor
Document Number:
LS1012AFS REV 0
www.nxp.com/QorIQ
NXP, the NXP logo, Freescale, CodeWarrior, Layerscape, QorIQ and SMARTMOS, are trademarks of NXP B.V.
All other product or service names are the property of their respective owners. ARM, Cortex and TrustZone are
registered trademarks of ARM Limited (or its subsidiaries) in the EU and/or elsewhere. CoreLink and NEON are
trademarks of ARM Limited (or its subsidiaries) in the EU and/or elsewhere. All rights reserved. © 2018 NXP B.V.
64-bit Arm
®
Cortex
®
-A53 core
Extreme power efficiency, delivering over 4,000 CoreMarks
®
at 1 W typical power
ECC-protected cache memories
First 1 W typical power embedded processor featuring Arm
Cortex-A53 core with ECC protected caches and coherent
256 KB L2 for high reliability applications
Rich connectivity and peripheral
features including PCI Express
®
Gen2,
USB 3.0, SATA 3, QuadSPI, SDIO
High integration that enables support for 802.11ac modules
and high bandwidth connectivity for ASICs, 4G/LTE, SATA,
low-cost NOR Flash
Packet acceleration engine
Delivers hardware acceleration for outstanding IP forwarding
and NAS performance
Security and trust architecture
Support for Arm TrustZone
®
and secure boot, together
with high performance cryptographic processing and
manufacturing protection
Low-cost board designs
The LS1012A package is engineered to support low-cost,
4-layer board designs to minimize system costs

LS1012ASE7EKA

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Microprocessors - MPU LS1012ASE7EKA/VFLGA211///TRAY MULTIPLE DP BAKEABLE
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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