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DG417DJ

P1-P3P4-P6P7-P9P10-P12
DG417/DG418/DG419
Improved, SPST/SPDT Analog Switches
_______________________________________________________________________________________ 7
_____________________________________________________Test Circuits/Timing Diagrams
t
R
< 20ns
t
F
< 20ns
50%
0V
LOGIC
INPUT
V-
-15V
R
L
300Ω
S
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
V
OUT
= V
D (
R
L
)
R
L
+ R
DS(ON
)
SWITCH
INPUT
IN
+3V
t
OFF
0V
D
SWITCH
OUTPUT
0.9 x V
OUT
0.9 x V
OUT
t
ON
V
OUT
SWITCH
OUTPUT
LOGIC
INPUT
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
VL
V+
C
L
35pF
+5V
+15V
V
OUT
DG417
DG418
t
R
< 20ns
t
F
< 20ns
50%
0V
LOGIC
INPUT
V-
-15V
R
L
1000Ω
D
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
LOGIC
INPUT
S1
IN
t
TRANS
+3V
t
TRANS
V
OUT1
V+
S2
V
OUT
0.8 x V
OUT1
V
OUT2
0.8 x V
OUT2
SWITCH
OUTPUT
VL
DG419
+15V
+5V
C
L
35pF
Figure 2. DG417/DG418 Switching Time
Figure 3. DG419 Transition Time
DG417/DG418/DG419
Improved, SPST/SPDT Analog Switches
8 _______________________________________________________________________________________
50%
V
OUT1
V
OUT2
0.9 x V
OUT
+3V
0V
0V
LOGIC
INPUT
SWITCH
OUTPUT 1
SWITCH
OUTPUT 2
V
OUT
0.9 x V
OUT
t
D
t
D
LOGIC
INPUT
V-
-15V
R
L
300Ω
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
S2
D
IN1, IN2
VL
S1
V
OUT
V+
DG419
+5V
+15V
C
L
35pF
+10V
Figure 5. Charge Injection
V
GEN
GND
D
C
L
10nF
V
OUT
-15V
V-
V+
VL
V
OUT
IN
OFF
ON
OFF
∆V
OUT
Q = ∆V
OUT
x C
L
S
+5V
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
OFF
ON
OFF
IN
V
IN
= +3V
DG417
DG418
DG419
+15V
Figure 4. DG419 Break-Before-Make Interval
______________________________________Test Circuits/Timing Diagrams (continued)
DG417/DG418/DG419
Improved, SPST/SPDT Analog Switches
_______________________________________________________________________________________ 9
SIGNAL
GENERATOR 0dBm
+15V
V+
S2
R
L
GND
D
V-
-15V
0V or 2.4V
IN
S1
50Ω
VL
D
DG419
+5V
NETWORK
ANALYZER
10nF
10nF
CAPACITANCE
METER
S
D
GND
V-
-15V
IN
0V or
2.4V
+15V
VL
+5V
f = 1MHz
V+
DG417
DG418
DG419
10nF
10nF
S
D
GND
V-
-15V
IN
0V or
2.4V
+15V
VL
+5V
V+
DG417
DG418
DG419
CAPACITANCE
METER
f = 1MHz
10nF
10nF
Figure 6. Off-Isolation Rejection Ratio Figure 7. DG419 Crosstalk
Figure 8. Drain-Source Off-Capacitance
Figure 9. Drain-Source On-Capacitance
______________________________________Test Circuits/Timing Diagrams (continued)
P1-P3P4-P6P7-P9P10-P12

DG417DJ

Mfr. #:
Buy DG417DJ
Manufacturer:
Maxim Integrated
Description:
Analog Switch ICs Improved, SPST/SPDT Analog Switches
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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