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74LVCH16374ABX,518

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
74LVC_LVCH16374A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 11 — 16 January 2013 15 of 20
NXP Semiconductors
74LVC16374A; 74LVCH16374A
16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
Fig 12. Package outline SOT362-1 (TSSOP48)
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(2)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
0.15
0.05
0.2
0.1
8
0
o
o
0.1
DIMENSIONS (mm are the original dimensions).
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
SOT362-1
99-12-27
03-02-19
w M
θ
A
A
1
A
2
D
L
p
Q
detail X
E
Z
e
c
L
X
(A )
3
0.25
124
48 25
y
pin 1 index
b
H
1.05
0.85
0.28
0.17
0.2
0.1
12.6
12.4
6.2
6.0
0.5 1 0.25
8.3
7.9
0.50
0.35
0.8
0.4
0.08
0.8
0.4
p
E
v M
A
A
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm
SOT362-1
A
max.
1.2
0
2.5
5 mm
scale
MO-153
74LVC_LVCH16374A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 11 — 16 January 2013 16 of 20
NXP Semiconductors
74LVC16374A; 74LVCH16374A
16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
Fig 13. Package outline SOT1134-1 (HXQFN60U)
References
Outline
version
European
projection
Issue date
IEC JEDEC JEITA
SOT1134-1 - - -
- - -
- - -
sot1134-1_po
08-12-17
09-01-22
Unit
mm
max
nom
min
0.50
0.48
0.46
0.05
0.02
0.00
4.1
4.0
3.9
1.90
1.85
1.80
6.1
6.0
5.9
3.90
3.85
3.80
1 2.5 4.5
0.125
0.075
0.025
0.07
A
Dimensions
HXQFN60U: plastic thermal enhanced extremely thin quad flat package; no leads;
60 terminals; UTLP based; body 4 x 6 x 0.5 mm SOT1134-1
A
1
b
0.35
0.30
0.25
DD
h
EE
h
0.08 0.1
yy
1
e
0.5
e
1
e
2
e
3
3
e
4
eR
0.5
k
0.25
0.20
0.15
L
0.35
0.30
0.25
L
1
v
0.05
w
0 2.5 5 mm
scale
AC
B
v
Cw
B A
terminal 1
index area
D
E
C
y
C
y
1
X
detail X
A
A
1
e
R
e
3
e
4
e
2
e
1
e
e
1/2 e
1/2 e
b
AC
B
v
Cw
k
L
B20 B18
A27
D8
D4A32
D5
D7D6
D1
D3D2
D
h
E
h
L
1
terminal 1
index area
A11 A16
B10B8
A17
B11
B17
A26A1
B1
A10
B7
74LVC_LVCH16374A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 11 — 16 January 2013 17 of 20
NXP Semiconductors
74LVC16374A; 74LVCH16374A
16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
13. Abbreviations
14. Revision history
Table 10. Abbreviations
Acronym Description
CDM Charged Device Model
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74LVC_LVCH16374A v.11 20130116 Product data sheet - 74LVC_LVCH16374A v.10
Modifications:
• Minor non-technical text changes and corrections
• Document revision history correction
74LVC_LVCH16374A v.10 20120301 Product data sheet - 74LVC_LVCH16374A v.9
74LVC_LVCH16374A v.9 20111219 Product data sheet - 74LVC_LVCH16374A v.8
74LVC_LVCH16374A v.8 20110621 Product data sheet - 74LVC_LVCH16374A v.7
74LVC_LVCH16374A v.7 20100323 Product data sheet - 74LVC_LVCH16374A v.6
74LVC_LVCH16374A v.6 20090212 Product data sheet - 74LVC_LVCH16374A v.5
74LVC_LVCH16374A v.5 20031212 Product specification - 74LVC_H16374A v.4
74LVC_H16374A v.4 19980317 Product specification - 74LVC16374A_
74LVCH16374A v.3
74LVC16374A_
74LVCH16374A v.3
19980317 Product specification - 74LVC16374A v.2
74LVC16374A v.2 19970822 Product specification - 74LVC16374A v.1
74LVC16374A v.1 - - - -
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

74LVCH16374ABX,518

Mfr. #:
Buy 74LVCH16374ABX,518
Manufacturer:
Nexperia
Description:
Flip Flops D-Type 3.3V 7.5ns
Lifecycle:
New from this manufacturer.
Delivery:
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