MAX1236–MAX1239
2.7V to 3.6V and 4.5V to 5.5V, Low-Power,
4-/12-Channel, 2-Wire Serial, 12-Bit ADCs
_______________________________________________________________________________________ 7
200
300
250
350
400
450
500
550
600
650
700
750
800
0 2030406080100
AVERAGE SUPPLY CURRENT vs.
CONVERSION RATE (EXTERNAL CLOCK)
MAX1236 toc07
CONVERSION RATE (ksps)
AVERAGE I
DD
(μA)
010 50 70 90
A
B
A) INTERNAL REFERENCE ALWAYS ON
B) EXTERNAL REFERENCE
MAX1238
0.9990
0.9994
0.9992
0.9998
0.9996
1.0002
1.0000
1.0004
1.0008
1.0006
1.0010
-40 -10 5-25 20 35 50 65 80
INTERNAL REFERENCE VOLTAGE
vs. TEMPERATURE
MAX1236 toc08
TEMPERATURE (°C)
V
REF
NORMALIZED
NORMALIZED TO VALUE AT +25°C
MAX1238
MAX1239
0.99990
0.99994
0.99992
0.99998
0.99996
1.00002
1.00000
1.00004
1.00008
1.00006
1.00010
2.7 3.3 3.6 3.93.0 4.2 4.5 4.8 5.1 5.4
NORMALIZED REFERENCE VOLTAGE
vs. SUPPLY VOLTAGE
MAX1236 toc09
V
DD
(V)
V
REF
(V)
MAX1236/MAX1238
NORMALIZED TO
REFERENCE VALUE AT
V
DD
= 5V
MAX1237/MAX1239
NORMALIZED TO
REFERENCE VALUE AT
V
DD
= 3.3V
Typical Operating Characteristics (continued)
(V
DD
= 3.3V (MAX1237/MAX1239), V
DD
= 5V (MAX1236/MAX1238), f
SCL
= 1.7MHz, (50% duty cycle), f
SAMPLE
= 94.4ksps, single-
ended, unipolar, T
A
= +25°C, unless otherwise noted.)
OFFSET ERROR vs. TEMPERATURE
MAX1236 toc10
TEMPERATURE (°C)
OFFSET ERROR (LSB)
806535 50-10 5 20-25
-0.9
-0.8
-0.7
-0.6
-0.5
-0.4
-0.3
-0.2
-0.1
0
-1.0
-40
OFFSET ERROR vs. SUPPLY VOLTAGE
MAX1236 toc11
V
DD
(V)
OFFSET ERROR (LSB)
5.2 5.54.74.23.73.2
-1.6
-1.2
-0.8
-0.4
0
0.4
0.8
1.2
1.6
2.0
-2.0
2.7
GAIN ERROR vs. TEMPERATURE
MAX1236 toc12
TEMPERATURE (°C)
GAIN ERROR (LSB)
806535 50-10 5 20-25
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0
-40
MAX1236–MAX1239
2.7V to 3.6V and 4.5V to 5.5V, Low-Power,
4-/12-Channel, 2-Wire Serial, 12-Bit ADCs
8 _______________________________________________________________________________________
Pin Description
PIN
MAX1236
MAX1237
MAX1238
MAX1239
NAME DESCRIPTION
1, 2, 3 1, 2, 3 AIN0–AIN2
4–8 AIN3–AIN7
16, 15, 14 AIN8–AIN10
Analog Inputs
4 AIN3/REF
Analog Input 3/Reference Input or Output. Selected in the setup
register (see Tables 1 and 6).
13 AIN11/REF
Analog Input 11/Reference Input or Output. Selected in the setup
register (see Tables 1 and 6).
5 9 SCL Clock Input
6 10 SDA Data Input/Output
7 11 GND Ground
812V
DD
Positive Supply. Bypass V
DD
to GND with a 0.1µF capacitor as close
as possible to the device.
t
HD.STA
t
SU.DAT
t
HIGH
t
R
t
F
t
HD.DAT
t
HD.STA
S
Sr
A
SCL
SDA
t
SU.STA
t
LOW
t
BUF
t
SU.STO
PS
t
HD.STA
t
SU.DAT
t
HIGH
t
FCL
t
HD.DAT
t
HD.STA
S Sr A
SCL
SDA
t
SU.STA
t
LOW
t
BUF
t
SU.STO
S
t
RCL
t
RCL1
HS-MODE F/S-MODE
A. F/S-MODE 2-WIRE SERIAL INTERFACE TIMING
B. HS-MODE 2-WIRE SERIAL INTERFACE TIMING
t
FDA
t
RDA
t
t
R
t
F
P
Figure 1. 2-Wire Serial Interface Timing
Detailed Description
The MAX1236–MAX1239 analog-to-digital converters
(ADCs) use successive-approximation conversion tech-
niques and fully differential input track/hold (T/H) cir-
cuitry to capture and convert an analog signal to a
serial 12-bit digital output. The MAX1236/MAX1237 are
4-channel ADCs, and the MAX1238/MAX1239 are 12-
channel ADCs. These devices feature a high-speed, 2-
wire serial interface supporting data rates up to 1.7MHz.
Figure 2 shows the simplified internal structure for the
MAX1238/MAX1239.
Power Supply
The MAX1236–MAX1239 operates from a single supply
and consumes 670µA (typ) at sampling rates up to
94.4ksps. The MAX1237/MAX1239 feature a 2.048V
internal reference and the MAX1236/MAX1238 feature
a 4.096V internal reference. All devices can be config-
ured for use with an external reference from 1V to V
DD
.
Analog Input and Track/Hold
The MAX1236–MAX1239 analog-input architecture con-
tains an analog-input multiplexer (mux), a fully differen-
tial track-and-hold (T/H) capacitor, T/H switches, a
comparator, and a fully differential switched capacitive
digital-to-analog converter (DAC) (Figure 4).
In single-ended mode, the analog input multiplexer con-
nects C
T/H
between the analog input selected by
CS[3:0] (see the
Configuration/Setup Bytes (Write Cycle)
section) and GND (Table 3). In differential mode, the
analog-input multiplexer connects C
T/H
to the “+” and “-”
analog inputs selected by CS[3:0] (Table 4).
During the acquisition interval, the T/H switches are in
the track position and C
T/H
charges to the analog input
MAX1236–MAX1239
2.7V to 3.6V and 4.5V to 5.5V, Low-Power,
4-/12-Channel, 2-Wire Serial, 12-Bit ADCs
_______________________________________________________________________________________ 9
ANALOG
INPUT
MUX
AIN1
AIN11/REF
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
AIN9
AIN10
AIN0
SCL
SDA
INPUT SHIFT REGISTER
SETUP REGISTER
CONFIGURATION REGISTER
CONTROL
LOGIC
REFERENCE
4.096V (MAX1238)
2.048V (MAX1239)
INTERNAL
OSCILLATOR
OUTPUT SHIFT
REGISTER
AND RAM
REF
T/H
12-BIT
ADC
V
DD
GND
MAX1238
MAX1239
Figure 2. MAX1238/MAX1239 Simplified Functional Diagram
V
DD
I
OL
I
OH
V
OUT
400pF
SDA
Figure 3. Load Circuit

MAX1239EEE+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog to Digital Converters - ADC 12-Bit 12Ch 94.4ksps 3.6V Precision ADC
Lifecycle:
New from this manufacturer.
Delivery:
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