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HMC434ETR

P1-P3P4-P6P7-P9P10-P10
Data Sheet HMC434
Rev. E | Page 3 of 9
SPECIFICATIONS
V
CC
= 3 V, T
A
= 25°C, 50 Ω system, unless otherwise noted. P
IN
is input power.
Table 1.
Parameter Min Typ Max Unit Test Conditions / Comments
RADIO FREQUENCY (RF) INPUT
Frequency
0.2 8 GHz Sine wave input
Power –10 0 +10 dBm f
IN
= 1.0 GHz to 3.0 GHz
0 0 10 dBm f
IN
= 3.0 GHz to 8.0 GHz
RF OUTPUT
SSB Phase Noise −150 dBc/Hz 100 kHz offset, P
IN
= 0 dBm, f
IN
= 4.0 GHz
Power –5 –2 dBm f
IN
= 1.0 GHz to 8.0 GHz
REVERSE LEAKAGE −25 dBm P
IN
= 0 dBm, f
IN
= 4.0 GHz, output terminated
SUPPLY
Voltage (V
) 2.85 3 3.15 V
Current (I
) 62 83 mA
1
Below 200 MHz, a square wave input is required.
HMC434 Data Sheet
Rev. E | Page 4 of 9
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage (V
CC
) −0.3 V to +3.5 V
RF Input Power (V
CC
= 3 V)
13 dBm
Temperature
Operating −40°C to +85°C
Storage −65°C to +125°C
Junction, T
J
135°C
Nominal (T
A
= 85°C) 99°C
Reflow 260°C
ESD Sensitivity
Human Body Model (HBM) Class 0
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
θ
JA
is the natural convection junction to ambient thermal
resistance measured in a one cubic foot sealed enclosure. θ
JC
is
the junction to case thermal resistance.
Table 3. Thermal Resistance
Package Type θ
JA
1
θ
JC
2
Unit
RJ-6 359 70 °C/W
1
Simulated values per JEDEC JESD51-12 standards.
2
Junction to GND package pin.
ESD CAUTION
Data Sheet HMC434
Rev. E | Page 5 of 9
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1, 4 NIC Not Internally Connected. These pins can be connected to RF and dc ground without affecting performance.
The NIC pins are typically tied to GND for enhanced thermal performance (but not required).
2 GND Ground. This pin must be connected to both RF and dc ground.
3 IN RF Input. This pin must be dc blocked.
5
VCC
Supply Voltage (3 V).
6
OUT
RF Output. This pin must be dc blocked.
INTERFACE SCHEMATICS
Figure 3. GND Interface Schematic
Figure 4. IN Interface Schematic
Figure 5. OUT Interface Schematic
Figure 6. VCC Interface Schematic
NIC
1
GND
2
IN
3
OUT
6
VCC
5
NIC
4
HMC434
TOP VIEW
(Not to Scale)
NOTES
1. NOT INTERNALLY CONNECTED. THESE PINS CAN
BE CONNECTED TO RF AND DC GROUND WITHOUT
AFFECTING PERFORMANCE. THE NIC PINS ARE
TYPICALLY TIED TO GND FOR ENHANCED
THERMAL PERFORMANCE (BUT NOT REQUIRED).
15684-002
GND
15684-003
50Ω
VCC
IN
15684-004
50Ω
OUT
VCC
15684-005
8pF
VCC
15684-006
P1-P3P4-P6P7-P9P10-P10

HMC434ETR

Mfr. #:
Buy HMC434ETR
Manufacturer:
Analog Devices / Hittite
Description:
Prescaler InGaP HBT Divide-by-8 SMT, DC - 8 GHz
Lifecycle:
New from this manufacturer.
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