LTC3108-1
17
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applicaTions inForMaTion
Design Example 1
This design example will explain how to calculate the
necessary storage capacitor value for V
OUT
in pulsed
load applications, such as a wireless sensor/transmit
-
ter. In these types of applications, the load is very small
for a majority of the time (while the circuitry is in a low
power sleep state), with bursts of load current occur
-
ring periodically during a transmit burst. The storage
capacitor on V
OUT
supports the load during the transmit
burst, and the long sleep time between bursts allows
the LTC3108-1 to recharge the capacitor. A method for
calculating the maximum rate at which the load pulses
can occur for a given output current from the LTC3108-1
will also be shown.
In this example, V
OUT
is set to 3V, and the maximum al-
lowed voltage droop during a transmit burst is 10%, or
0.3V. The duration of a transmit burst is 1ms, with a total
average current requirement of 40mA during the burst.
Given these factors, the minimum required capacitance
on V
OUT
is:
C
OUT
(µF) ≥
= 133µF
Note that this equation neglects the effect of capacitor
ESR on output voltage droop. For most ceramic or low
ESR tantalum capacitors, the ESR will have a negligible
effect at these load currents.
A standard value of 150µF or larger could be used for C
OUT
in this case. Note that the load current is the total current
draw on V
OUT
, V
OUT2
and VLDO, since the current for all of
these outputs must come from V
OUT
during a burst. Current
contribution from the holdup capacitor on VSTORE is not
considered, since it may not be able to recharge between
bursts. Also, it is assumed that the charge current from
the LTC3108-1 is negligible compared to the magnitude
of the load current during the burst.
To calculate the maximum rate at which load bursts can
occur, determine how much charge current is available
from the LTC3108-1 V
OUT
pin given the input voltage
source being used. This number is best found empirically,
since there are many factors affecting the efficiency of
the converter. Also determine what the total load cur
-
rent is on V
OUT
during the sleep state (between bursts).
Note that this must include any losses, such as storage
capacitor leakage.
Assume, for instance, that the charge current from the
LTC3108-1 is 50µA and the total current drawn on V
OUT
in the sleep state is 17µA, including capacitor leakage. In
addition, use the value of 150µF for the V
OUT
capacitor.
The maximum transmit rate (neglecting the duration of
the transmit burst, which is typically very short) is then
given by:
t =
(50µA − 17µA)
= 1.36sec or f
MAX
= 0.73Hz
Therefore, in this application example, the circuit can sup-
port a 1ms transmit burst every 1.3 seconds.
It can be determined that for systems that only need to
transmit every few seconds (or minutes or hours), the
average charge current required is extremely small, as
long as the sleep current is low. Even if the available
charge current in the example above was only 10µA and
the sleep current was only 5µA, it could still transmit a
burst every 9 seconds.
The following formula enables the user to calculate the
time it will take to charge the LDO output capacitor and
the V
OUT
capacitor the first time, from 0V. Here again, the
charge current available from the LTC3108-1 must be
known. For this calculation, it is assumed that the LDO
output capacitor is 2.2µF.
t
LDO
=
I
CHG
−I
LDO
If there were 50µA of charge current available and a 5µA
load on the LDO (when the processor is sleeping), the time
for the LDO to reach regulation would be 107ms.
If V
OUT
were programmed to 3V and the V
OUT
capacitor
was 150µF, the time for V
OUT
to reach regulation would be:
t
VOUT
=
I
CHG
−I
VOUT
−I
LDO
+ t
LDO
