MT3170B/71B, MT3270B/71B, MT3370B/71B Data Sheet
10
Zarlink Semiconductor Inc.
Typical figures are at 25
°C and are for design aid only: not guaranteed and not subject to production testing
* Test Conditions 1. dBm refers to a reference power of 1 mW delivered into a 600 ohms load.
2. Data sequence consists of all DTMF digits.
3. Tone on = 40 ms, tone off = 40 ms.
4. Signal condition consists of nominal DTMF frequencies.
5. Both tones in composite signal have an equal amplitude.
6. Tone pair is deviated by
±1.5%± 2 Hz.
7. Bandwidth limited (0-3 kHz) Gaussian noise.
8. Precise dial tone frequencies are 350 Hz and 440 Hz (
± 2%).
9. Referenced to lowest level frequency component in DTMF signal.
10. Referenced to the minimum valid accept level.
11. Both tones must be within valid input signal range.
12. External guard time for MT3x70B = 20 ms.
13. Timing parameters are measured with 70pF load at SD output.
14. Time duration between PWDN pin changes from ‘1‘ to ‘0‘ and ESt/DStD becomes active.
15. Guaranteed by design and characterization. Not subject to production testing.
16. Value measured with an applied tone of 450 Hz.
18 Interdigit pause accept (DStD
logic output)
t
ID
40 ms MT3x71B
19 Interdigit pause reject (DStD
logic output)
t
DO
20 ms MT3x71B
20 Data shift rate 40-60% duty cycle f
ACK
1.0 3.0 MHz 13,15
21 Propagation delay
(ACK to Data Bit)
t
PAD
100 140 ns 1MHz f
ACK
,
13,15
22 Data hold time (ACK to SD) t
DH
30 50 ns 13,15
AC Electrical Characteristics
- voltages are with respect to V
DD
=5V±5%, V
SS
=0V and temperature -40 to +85°C unless otherwise
stated.
Characteristics Sym. Min. Typ.
Max. Units Test Conditions*
MT3170B/71B, MT3270B/71B, MT3370B/71B Data Sheet
11
Zarlink Semiconductor Inc.
Figure 4 - Timing Diagram
Figure 5 - ACK to SD Timing
INPUT
ESt
(MT3x70B)
DStD
(MT3x71B)
ACK
SD
DTMF
Tone #n
t
DP
t
REC
t
DO
DTMF
Tone #n + 1
DTMF
Tone
#n + 1
Input
Signal
t
DA
t
REC
t
ID
LSB
MSB
b
0
b
1
b
2
b
3
b
0
b
1
b
2
b
3
t
SA
t
SD
Input
Signal
Envelope
LSB
MSB
t
DO
t
ID
- maximum allowable dropout during valid DTMF signals. (MT3x7xB).
t
REC
t
REC
t
DA
t
DP
t
SA
t
SD
- minimum time between valid DTMF signals (MT3x71B).
- maximum DTMF signal duration not detected as valid (MT3x7xB).
- minimum DTMF signal duration required for valid recognition (MT3x71B).
- time to detect the absence of valid DTMF signals (MT3x70B).
- time to detect the presence of valid DTMF signals (MT3x70B).
- supervisory tone integrator attack time (MT3x7xB).
- supervisory tone integrator decay time (MT3x7xB).
ESt/DStD
ACK
SD
V
IH
V
IL
V
IH
V
IL
1/f
ACK
t
PAD
t
DH
b
0
b
1
b
2
b
3
MSB
DTMF Energy
Detect
LSB
DTMF Energy
Detect

MT3371BSR1

Mfr. #:
Manufacturer:
Microchip / Microsemi
Description:
Telecom Line Management ICs Telecom Interface ICs Pb Free DTMF Rx. 4.19Mhz SOIC TAPE-REEL
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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