SSM3J132TU,LF Datasheet SSM3J132TU,LF | P1-P3

SSM3J132TU

2014-03-01

1

TOSHIBA Field-Effect Transistor Silicon P-Channel MOS Type (U-MOSⅥ)

SSM3J132TU

○ Power Management Switch Applications

• 1.2-V drive

• Low ON-resistance: R

DS(ON)

= 94 mΩ (max) (@V

GS

= -1.2 V)

R

DS(ON)

= 39 mΩ (max) (@V

GS

= -1.5 V)

R

DS(ON)

= 29 mΩ (max) (@V

GS

= -1.8 V)

R

DS(ON)

= 21 mΩ (max) (@V

GS

= -2.5 V)

R

DS(ON)

= 17 mΩ (max) (@V

GS

= -4.5 V)

Absolute Maximum Ratings

(Ta = 25°C)

Characteristic Symbol Rating Unit

Drain-Source voltage V

DSS

-12 V

Gate-Source voltage V

GSS

± 6 V

DC I

D

-5.4

Drain current

Pulse I

DP

-10.8

A

P

D

(Note 1)

500

Power dissipation

t<1s

1000

mW

Channel temperature T

ch

150 °C

Storage temperature range T

stg

-55 to 150 °C

Note: Using continuously under heavy loads (e.g. the application of high

temperature/current/voltage and the significant change in

temperature, etc.) may cause this product to decrease in the

reliability significantly even if the operating conditions (i.e.

operating temperature/current/voltage, etc.) are within the

absolute maximum ratings.

Please design the appropriate reliability upon reviewing the

Toshiba Semiconductor Reliability Handbook (“Handling

Precautions”/“Derating Concept and Methods”) and individual

reliability data (i.e. reliability test report and estimated failure rate,

etc).

Note 1: Mounted on an FR4 board.

(25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 645 mm

2

)

Marking Equivalent Circuit

(top view)

Unit: mm

UFM

JEDEC ―

JEITA ―

TOSHIBA 2-2U1A

Weight: 6.6 mg (typ.)

1: Gate

2: Source

3: Drain

JJK

1

2

3

1 2

3

Start of commercial production

2011-02

SSM3J132TU

2014-03-01

2

Electrical Characteristics

(Ta = 25°C)

Characteristic Symbol Test Conditions Min Typ. Max Unit

V

(BR) DSS

I

D

= -1 mA, V

GS

= 0 V -12 ⎯ ⎯

Drain-Source breakdown voltage

V

(BR) DSX

I

D

= -1 mA, V

GS

= 5 V (Note 3) -7 ⎯ ⎯

V

Drain cut-off current

I

DSS

V

DS

= -10 V, V

GS

= 0 V ⎯ ⎯ -1 μA

Gate leakage current

I

GSS

V

GS

= ±6 V, V

DS

= 0 V ⎯ ⎯ ±1 μA

Gate threshold voltage

V

th

V

DS

= -3 V, I

D

= -1 mA -0.3 ⎯ -1.0 V

Forward transfer admittance

⏐Y

fs

⏐ V

DS

= -3 V, I

D

= -2.0 A (Note 2) 11 22 ⎯ S

I

D

= -5.0 A, V

GS

= -4.5 V (Note 2) ⎯

14 17

I

D

= -5.0 A, V

GS

= -2.5 V (Note 2) ⎯

17 21

I

D

= -3.5 A, V

GS

= -1.8 V (Note 2) ⎯

20 29

I

D

= -1.5 A, V

GS

= -1.5 V (Note 2) ⎯

23 39

Drain–source ON-resistance R

DS (ON)

I

D

= -0.4 A, V

GS

= -1.2 V (Note 2) ⎯ 31 94

mΩ

Input capacitance

C

iss

⎯

2700

⎯

Output capacitance

C

oss

⎯

525

⎯

Reverse transfer capacitance

C

rss

V

DS

= -10 V, V

GS

= 0 V

f = 1 MHz

⎯

525

⎯

pF

Turn-on time t

on

⎯ 38

⎯

Switching time

Turn-off time t

off

V

DD

= -10 V, I

D

= -1.0 A

V

GS

= 0 to -2.5 V, R

G

= 4.7 Ω

⎯ 210

⎯

ns

Total Gate Charge

Q

g

⎯

33

⎯

Gate-Source Charge

Q

gs1

⎯

4.3

⎯

Gate-Drain Charge Q

gd

V

DD

= -6 V, I

DS

= -5.4 A,

V

GS

= -4.5 V

⎯

8

⎯

nC

Drain-Source forward voltage V

DSF

I

D

= 5.4 A, V

GS

= 0 V (Note 2)

⎯ 0.68 1.0 V

Note 2: Pulse test

Note 3: If a forward bias is applied between gate and source, this device enters V

(BR)DSX

mode.

Note that the drain-source breakdown voltage is lowered in this mode.

Switching Time Test Circuit

(a) Test Circuit (b) V

IN

Notice on Usage

Let V

th

be the voltage applied between gate and source that causes the drain current (I

D

)

to be low (-1 mA for the

SSM3J132TU). Then, for normal switching operation, V

GS(on)

must be higher than V

th,

and V

GS(off)

must be lower than

V

th.

This relationship can be expressed as: V

GS(off)

< V

th

< V

GS(on)

.

Take this into consideration when using the device.

Handling Precaution

When handling individual devices that are not yet mounted on a circuit board, make sure that the environment is

protected against electrostatic discharge. Operators should wear antistatic clothing, and containers and other objects that

come into direct contact with devices should be made of antistatic materials.

Thermal resistance R

th (ch-a)

and power dissipation P

D

vary depending on board material, board area, board thickness

and pad area. When using this device, please take heat dissipation into consideration.

(c) V

OUT

V

DD

= -10 V

R

G

= 4.7 Ω

Duty ≤ 1%

V

IN

: t

r

, t

f

< 5 ns

Common Source

Ta = 25°C

IN

0

−

2.5V

10 μs

V

DD

OUT

R

G

R

L

t

on

10%

90%

−2.5 V

0 V

90%

10%

t

off

t

r

t

f

V

DS

(

ON

)

V

DD

SSM3J132TU

2014-03-01

3

I

D

– V

DS

Drain-source voltage V

DS

(V)

Drain current I

D

(A)

Gate-source voltage V

GS

(V)

I

D

– V

GS

Drain current I

D

(mA)

R

DS (ON)

– V

GS

Gate-source voltage V

GS

(V)

Drain current I

D

(A)

R

DS (ON)

– I

D

Ambient temperature Ta (°C)

R

DS (ON)

– Ta

R

DS (ON)

– V

GS

Gate-source voltage V

GS

(V)

Drain-source ON-resistance

R

DS (ON)

(mΩ)

Drain-source ON-resistance

R

DS (ON)

(mΩ)

Drain-source ON-resistance

R

DS (ON)

(mΩ)

Drain-source ON-resistance

R

DS (ON)

(mΩ)

25°C

Ta = 100°C

−25°C

0

0 -1 -2 -3 -5 -6 -4

10

20

30

40

I

D

= -0.4A

Common source

Pulse test

25°C

Ta = 100°C

−25°C

I

D

= -2.0A

Common source

Pulse test

0

0 -1 -2 -3 -5 -6 -4

10

20

30

40

0

-10

0

-0.1 -0.3 -0.4 -0.5

-0.2

-5

-100000

-0.1

0 -0.25 -0.5 -0.75 -1 -1.25

-1

-10

-100

-1000

-10000

Ta = 100°C

25°C

-25°C

Common Source

V

DS

= -3 V

Pulse test

V

GS

=-4.5 V

-1.5 V

-1.2 V

Common Source

Ta = 25 °C

Pulse test

0

-10

20

40

-5

10

30

50

−50 0 50 100 150

10

20

30

40

50

0

Common source

Ta = 25 °C

Pulse test

-4.5 V

V

GS

=-1.2 V

-1.5V

-1.8V

-2.5V

I

D

= -0.4A / V

GS

= -1.2 V

-3.5A / -1.8 V

-5.0A / -2.5 V

-1.5A / -1.5 V

-5.0A / -4.5 V

Common source

Pulse test

-2.5 V

-1.8 V

SSM3J132TU,LF

SSM3J132TU,LF

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