the power dissipation across R1 even at the high end of
the universal AC input voltage (265VAC).
The MAX5052/MAX5053 include a cycle-by-cycle cur-
rent limit that turns off the gate drive to the external
MOSFET during an overcurrent condition. When using
the MAX5052 in the bootstrapped mode (if the power-
supply output is shorted), the tertiary winding voltage
drops below the 10V threshold causing the UVLO to
turn off the gate drive to the external power MOSFET.
This reinitiates a startup sequence with soft-start.
MAX5052/MAX5053
Undervoltage Lockout
The MAX5052/MAX5053 have an input voltage
UVLO/EN pin. The threshold for this UVLO is 1.28V.
Before any operation can commence, the voltage on
this pin has to exceed 1.28V. The UVLO circuit keeps
the CPWM comparator, ILIM comparator, oscillator,
and output driver shut down to reduce current con-
sumption (see the Functional Diagram).
Use this UVLO function to program the input-supply
start voltage. For example, a reasonable start voltage
for a 36V to 72V telecom range might be set at 34V.
Calculate the divider resistor values, R2 and R3 (see
Figure 1) by using the following formulas:
The value of R3 is calculated to minimize the voltage-
drop error across R2 as a result of the input bias cur-
rent of the UVLO/EN pin. V
ULR2
= 1.28V, I
UVLO
= 50nA
(max). V
IN
is the value of the input-supply voltage
where the power supply must start.
where I
UVLO
is the UVLO/EN pin input current (50nA),
and V
ULR2
is the UVLO/EN wake-up threshold.
MAX5052 Bootstrap
Undervoltage Lockout
In addition to the externally programmable UVLO func-
tion offered in both the MAX5052 and MAX5053, the
MAX5052 has an additional internal bootstrap UVLO
that is very useful when designing high-voltage power
supplies (see the Functional Diagram). This allows the
device to bootstrap itself during initial power-up. The
MAX5052 attempts to start when V
IN
exceeds the boot-
strap UVLO threshold of 21.6V.
During startup, the UVLO circuit keeps the CPWM com-
parator, ILIM comparator, oscillator, and output driver
shut down to reduce current consumption. Once V
IN
reaches 21.6V, the UVLO circuit turns on both the CPWM
and ILIM comparators, as well as the oscillator, and
allows the output driver to switch. If V
IN
drops below
9.7V, the UVLO circuit will shut down the CPWM com-
parator, ILIM comparator, oscillator, and output driver
returning the MAX5052/MAX5053 to the startup mode.
MAX5052 Startup Operation
Normally V
IN
is derived from a tertiary winding of the
transformer. However, at startup there is no energy
delivered through the transformer, hence, a special
bootstrap sequence is required. Figure 2 shows the
voltages on V
IN
and V
CC
during startup. Initially, both
V
IN
and V
CC
are 0V. After the line voltage is applied,
C1 charges through the startup resistor, R1, to an inter-
mediate voltage. At this point, the internal regulator
begins charging C2 (see Figure 1). The MAX5052 uses
only 45µA of the current supplied by R1, and the
remaining input current charges C1 and C2. The charg-
ing of C2 stops when the V
CC
voltage reaches approxi-
mately 9.5V, while the voltage across C1 continues
rising until it reaches the wake-up level of 21.6V. Once
V
IN
exceeds the bootstrap UVLO threshold, NDRV
begins switching the MOSFET and transfers energy to
the secondary and tertiary outputs. If the voltage on the
tertiary output builds to higher than 9.9V (the bootstrap
UVLO lower threshold), then startup has been accom-
plished and sustained operation commences.
