M41ST84Y, M41ST84W
22/31
DC AND AC PARAMETERS
This section summarizes the operating and mea-
surement conditions, as well as the DC and AC
characteristics of the device. The parameters in
the following DC and AC Characteristic tables are
derived from tests performed under the Measure-
ment Conditions listed in the relevant tables. De-
signers should check that the operating conditions
in their projects match the measurement condi-
tions when using the quoted parameters.
Table 10. DC and AC Measurement Conditions
Note: Output Hi-Z is defined as the point where data is no longer driven.
Figure 20. AC Testing Input/Output Waveforms
Note: 50pF for M41ST84W.
Table 11. Capacitance
Note: 1. Effective capacitance measured with power supply at 5V. Sampled only, not 100% tested.
2. At 25°C, f = 1MHz.
3. Outputs deselected.
Parameter M41ST84Y M41ST84W
V
CC
Supply Voltage
4.5 to 5.5V 2.7 to 3.6V
Ambient Operating Temperature –40 to 85°C 40 to 85°C
Load Capacitance (C
L
)
100pF 50pF
Input Rise and Fall Times 50ns 50ns
Input Pulse Voltages
0.2 to 0.8V
CC
0.2 to 0.8V
CC
Input and Output Timing Ref. Voltages
0.3 to 0.7V
CC
0.3 to 0.7V
CC
AI02568
0.8V
CC
0.2V
CC
0.7V
CC
0.3V
CC
Symbol
Parameter
(1,2)
Min Max Unit
C
IN
Input Capacitance 7 pF
C
IO
(3)
Input / Output Capacitance 10 pF
t
LP
Low-pass filter input time constant (SDA and SCL) 50 ns
23/31
M41ST84Y, M41ST84W
Table 12. DC Characteristics
Note: 1. Valid for Ambient Operating Temperature: T
A
= –40 to 85°C; V
CC
= 2.7 to 3.6V or 4.5 to 5.5V (except where noted).
2. RSTIN
internally pulled-up to V
CC
through 100K resistor. WDI internally pulled-down to V
SS
through 100K resistor.
3. Outputs deselected.
4. For PFO
and SQW pins (CMOS).
5. For IRQ
/FT/OUT, RST pins (Open Drain): if pulled-up to supply other than V
CC
, this supply must be equal to, or less than 3.0V when
V
CC
= 0V (during battery back-up mode).
6. For rechargeable back-up, V
BAT
(max) may be considered V
CC
.
Table 13. Crystal Electrical Characteristics (Externally Supplied)
Note: 1. Load capacitors are integrated within the M41ST84Y/W. Circuit board layout considerations for the 32.768kHz crystal of minimum
trace lengths and isolation from RF generating signals should be taken into account.
2. STMicroelectronics recommends the KDS DT-38: 1TA/1TC252E127, Tuning Fork Type (thru-hole) or the DMX-26S:
1TJS125FH2A212, (SMD) quartz crystal for industrial temperature operations. KDS can be contacted at kouhou@kdsj.co.jp or ht-
tp://www.kdsj.co.jp for further information on this crystal type.
Sym Parameter
Test
Condition
(1)
M41ST84Y M41ST84W
Unit
Min Typ Max Min Typ Max
I
BAT
Battery Current OSC
ON
T
A
= 25°C,
V
CC
= 0V,
V
BAT
= 3V
400 500 400 500 nA
Battery Current OSC
OFF
50 50 nA
I
CC1
Supply Current f = 400kHz 1.4 0.75 mA
I
CC2
Supply Current
(Standby)
SCL, SDA =
V
CC
– 0.3V
10.50mA
I
LI
(2)
Input Leakage Current
0V V
IN
V
CC
±1 ±1 µA
Input Leakage Current
(PFI)
–25 2 25 –25 2 25 nA
I
LO
(3)
Output Leakage
Current
0V V
OUT
V
CC
±1 ±1 µA
V
IH
Input High Voltage
0.7V
CC
V
CC
+ 0.3 0.7V
CC
V
CC
+ 0.3
V
V
IL
Input Low Voltage –0.3
0.3V
CC
–0.3
0.3V
CC
V
V
BAT
Battery Voltage 2.5 3.0
3.5
(6)
2.5 3.0
3.5
(6)
V
V
OH Output High Voltage
(4)
I
OH
= –1.0mA
2.4 2.4 V
V
OL
Output Low Voltage
I
OL
= 3.0mA
0.4 0.4 V
Output Low Voltage
(Open Drain)
(5)
I
OL
= 10mA
0.4 0.4 V
Pull-up Supply Voltage
(Open Drain)
RST
,
IRQ
/FT/OUT
5.5 3.6 V
V
PFD
Power Fail Deselect 4.20 4.40 4.50 2.55 2.60 2.70 V
V
PFI
PFI Input Threshold
V
CC
= 5V(Y)
V
CC
= 3V(V)
1.225 1.250 1.275 1.225 1.250 1.275 V
PFI Hysteresis PFI Rising 20 70 20 70 mV
V
SO
Battery Back-up
Switchover
2.5 2.5 V
Symbol
Parameter
(1,2)
Typ Min Max Unit
f
0
Resonant Frequency 32.768 kHz
R
S
Series Resistance 50 k
C
L
Load Capacitance 12.5 pF
M41ST84Y, M41ST84W
24/31
Figure 21. Power Down/Up Mode AC Waveforms
Table 14. Power Down/Up AC Characteristics
Note: 1. Valid for Ambient Operating Temperature: T
A
= –40 to 85°C; V
CC
= 2.7 to 3.6V or 4.5 to 5.5V (except where noted).
2. V
PFD
(max) to V
PFD
(min) fall time of less than tF may result in deselection/write protection not occurring until 200µs after V
CC
passes
V
PFD
(min).
3. V
PFD
(min) to V
SS
fall time of less than t
FB
may cause corruption of RAM data.
4. Programmable (see Table 7., page 21)
5. At 25°C (when using SOH28 + M4T28-BR12SH SNAPHAT top); V
CC
= 0V.
Symbol
Parameter
(1)
Min Typ Max Unit
t
F
(2)
V
PFD
(max) to V
PFD
(min) V
CC
Fall Time
300 µs
t
FB
(3)
V
PFD
(min) to V
SS
V
CC
Fall Time
10 µs
t
PFD
PFI to PFO Propagation Delay 15 25 µs
t
R
V
PFD
(min) to V
PFD
(max) V
CC
Rise Time
10 µs
t
RB
V
SS
to V
PFD
(min) V
CC
Rise Time
s
t
REC(4)
Power up Deselect Time 40 200 ms
t
DR
(5)
Expected Data Retention Time 10 YEARS
AI03681
V
CC
INPUTS
(PER CONTROL INPUT)
OUTPUTS
DON'T CARE
HIGH-Z
tF
tFB
tR
tRB
tDR
VALID VALID
(PER CONTROL INPUT)
RECOGNIZEDRECOGNIZED
V
PFD
(max)
V
PFD
(min)
V
SO
tREC
RST
PFO

M41ST84YMQ6E

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
IC RTC CLK/CALENDAR I2C 16-SOIC
Lifecycle:
New from this manufacturer.
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