INMP621
Figure 14. Stereo PDM Microphone Connection to Codec
Decouple the VDD pin of the INMP621 to GND with a 0.1 µF capacitor. Place this capacitor as close to VDD as the printed circuit board
(PCB) layout allows.
Do not use a pull-up or pull-down resistor on the PDM data signal line because it can pull the signal to an incorrect state during the period
that the signal line is tristated.
The DATA signal does not need to be buffered in normal use when the INMP621 microphone(s) is placed close to the codec on the PCB. If the DATA signal
must be driven over a long cable (>15 cm) or other large capacitive load, a digital buffer may be required. Only use a signal buffer on the
DATA line when one microphone is in use or after the point where two microphones are connected (see Figure 15
). The DATA output of
each microphone in a stereo configuration cannot be individually buffered because the two buffer outputs cannot drive a single signal line. If a
buffer is used, take care to select one with low propagation delay so that the timing of the data connected to the codec is not corrupted.
CLOCK OUTPUT
CODEC
0.1µF
1.8 V TO 3.3 V
GND
L/R SELECT
DATA
INMP621
CLK
VDD
DATA INPUT
0.1µF
1.8 V TO 3.3 V
GND
L/R SELECT
DATA
INMP621
CLK
VDD
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Document Number: DS-INMP621-00
Revision: 1.1
Rev Date: 05/21/2014
INMP621
Figure 15. Buffered Connections Between Stereo INMP621s and a Codec
When long wires are used to connect the codec to the INMP621, a source termination resistor can be used on the clock output of the
codec instead of a buffer to minimize signal overshoot or ringing. Match the value of this resistor to the characteristic impedance of
the CLK trace on the PCB. Depending on the drive capability of the codec clock output, a buffer may still be needed, as shown in Figure
15
.
SLEEP MODE
The microphone enters sleep mode when the clock frequency falls below 1 kHz. In this mode, the microphone data output is in a high
impedance state. The current consumption in sleep mode is less than 5.5 µA.
The INMP621 enters sleep mode within 1ms of the clock frequency falling below 1 kHz. The microphone wakes up from sleep mode
and begins to output data 32,768 cycles after the clock becomes active. For a 3.072 MHz clock, the microphone starts to output data in
10.7 ms. For a 2.4 MHz clock, the microphone starts to output data in 13.7 ms. The wake-up time, as specified in Table 2, indicates the
time from when the clock is enabled to when the INMP621 outputs data within 3 dB of its settled sensitivity.
START-UP TIME
The start-up time of the INMP621 from when the clock is active is the same as the wake-up time. The microphone starts up 32,768
cycles after the clock is active.
CLOCK OUTPUT
CODEC
DATA
INMP621
INMP621
CLK
DATA INPUT
DATA
CLK
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Document Number: DS-INMP621-00
Revision: 1.1
Rev Date: 05/21/2014
INMP621
SUPPORTING DOCUMENTS
For additional information, see the following documents.
EVALUATION BOARD USER GUIDE
UG-326 PDM Digital Output MEMS Microphone Evaluation Board
APPLICATION NOTE (PRODUCT SPECIFIC)
AN-0078 High Performance Digital MEMS Microphone Simple Interface to a SigmaDSP Audio Codec
APPLICATION NOTES (GENERAL)
AN-1003 Recommendations for Mounting and Connecting the Invensense, Bottom-Ported MEMS Microphones
AN-1068 Reflow Soldering of the MEMS Microphone
AN-1112 Microphone Specifications Explained
AN-1124 Recommendations for Sealing Invensense, Bottom-Port MEMS Microphones from Dust and Liquid Ingress
AN-1140 Microphone Array Beamforming
Page 15 of 21
Document Number: DS-INMP621-00
Revision: 1.1
Rev Date: 05/21/2014

INMP621ACEZ-R0

Mfr. #:
Manufacturer:
TDK InvenSense
Description:
MEMS Microphones Wide Dynamic Range Microphone with PDM Digital Output
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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