8 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. E
10/25/2013
IS61NLF25672/IS61NVF25672
IS61NLF51236/IS61NVF51236
IS61NLF102418/IS61NVF102418
SYNCHRONOUS TRUTH TABLE
(1)
Address
Operation Used CE CE2 CE2 ADV WE BWx OE CKE CLK
NotSelected N/A H X X L X X X L ↑
NotSelected N/A X L X L X X X L ↑
NotSelected N/A X X H L X X X L ↑
NotSelectedContinue N/A X X X H X X X L ↑
BeginBurstRead ExternalAddress L H L L H X L L ↑
ContinueBurstRead NextAddress X X X H X X L L ↑
NOP/DummyRead ExternalAddress L H L L H X H L ↑
DummyRead NextAddress X X X H X X H L ↑
BeginBurstWrite ExternalAddress L H L L L L X L ↑
ContinueBurstWrite NextAddress X X X H X L X L ↑
NOP/WriteAbort N/A L H L L L H X L ↑
WriteAbort NextAddress X X X H X H X L ↑
IgnoreClock CurrentAddress X X X X X X X H ↑
Notes:
1. "X"meansdon'tcare.
2. Therisingedgeofclockissymbolizedby↑
3. A continue deselect cycle can only be entered if a deselect cycle is executed first.
4. WE=LmeansWriteoperationinWriteTruthTable.
WE=HmeansReadoperationinWriteTruthTable.
5. Operation finally depends on status of asynchronous pins (ZZ and OE).
BURST
READ
DESELECT
BURST
WRITE
BEGIN
READ
BEGIN
WRITE
READ
WRITE
READ
WRITE
BURST
BURST
BURST
DS
DS
DS
READ
DSDS
READ WRITE
WRITE
BURST
BURST
WRITE
READ
STATE DIAGRAM