24 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. E
10/25/2013
IS61NLF25672/IS61NVF25672
IS61NLF51236/IS61NVF51236
IS61NLF102418/IS61NVF102418
TAP INSTRUCTION SET
Eight instructions are possible with the three-bit instruction
register and all combinations are listed in the Instruction
Codetable.Three instructions are listed as
RESERVED
and should not be used and the other five instructions are
describedbelow.TheTAPcontrollerusedinthisSRAM
isnotfullycompliantwiththe1149.1conventionbecause
some mandatory instructions are not fully implemented.
TheTAPcontrollercannotbeusedtoloadaddress,dataor
control signals and cannot preload the
Input
or
Output
buf-
fers.The
SRAM
does not implement the
1149.1
commands
EXTEST
or
INTEST
or the
PRELOAD
portion of
SAMPLE/
PRELOAD
; instead it performs a capture of the
Inputs and
Output
ring when these instructions are executed. Instruc-
tionsareloadedintotheTAPcontrollerduringtheShift-IR
statewhentheinstructionregisterisplacedbetweenTDI
andTDO.Duringthisstate,instructionsareshiftedfrom
theinstructionregisterthroughtheTDIandTDOpins.To
executeaninstructiononceitisshiftedin,theTAPcontrol-
lermustbemovedintotheUpdate-IRstate.
EXTEST
EXTESTisamandatory1149.1instructionwhichistobe
executed whenever the instruction register is loaded with
all0s.BecauseEXTESTisnotimplementedintheTAP
controller,thisdeviceisnot1149.1standardcompliant.
TheTAPcontrollerrecognizesanall-0instruction.Whenan
EXTESTinstructionisloadedintotheinstructionregister,
theSRAMrespondsasifaSAMPLE/PRELOADinstruction
hasbeenloaded.Thereisadifferencebetweentheinstruc-
tions, unlike the
SAMPLE/PRELOAD
instruction,EXTEST
placestheSRAMoutputsinaHigh-Zstate.
IDCODE
The IDCODE instruction causes a vendor-specic, 32-
bit code to be loaded into the instruction register. It also
placestheinstructionregisterbetweentheTDIandTDO
pins and allows the IDCODE to be shifted out of the device
when theTAP controller enters the Shift-DRstate.The
IDCODE instruction is loaded into the instruction register
uponpower-uporwhenevertheTAPcontrollerisgivena
test logic reset state.
SAMPLE-Z
The SAMPLE-Z instruction causes the boundary scan
registertobeconnectedbetweentheTDIandTDOpins
whentheTAPcontrollerisinaShift-DRstate.Italsoplaces
allSRAMoutputsintoaHigh-Zstate.
SAMPLE/PRELOAD
SAMPLE/PRELOADisa1149.1mandatoryinstruction.The
PRELOADportionofthisinstructionisnotimplemented,so
theTAPcontrollerisnotfully1149.1compliant.Whenthe
SAMPLE/PRELOADinstructionisloadedtotheinstruc-
tionregisterandtheTAPcontrollerisintheCapture-DR
state, a snapshot of data on the inputs and output pins is
captured in the boundary scan register.
ItisimportanttorealizethattheTAPcontrollerclockoper-
atesatafrequencyupto10MHz,whiletheSRAMclock
runsmorethananorderofmagnitudefaster.Becauseof
the clock frequency differences, it is possible that during
theCapture-DRstate,aninputoroutputwillunder-goa
transition.TheTAPmayattemptasignalcapturewhilein
transition(metastablestate).Thedevicewillnotbeharmed,
but there is no guarantee of the value that will be captured
or repeatable results.
Toguaranteethattheboundaryscanregisterwillcapture
thecorrectsignalvalue,theSRAMsignalmustbestabilized
longenoughtomeettheTAPcontroller’scaptureset-up
plus hold times (tcS and tch).ToinsurethattheSRAMclock
input is captured correctly, designs need a way to stop (or
slow)theclockduringaSAMPLE/PRELOADinstruction.
If this is not an issue, it is possible to capture all other
signalsandsimplyignorethevalueoftheCLKcaptured
in the boundary scan register.
Once the data is captured, it is possible to shift out the data
byputtingtheTAPintotheShift-DRstate.Thisplacesthe
boundaryscanregisterbetweentheTDIandTDOpins.
Notethatsincethe
PRELOAD
part of the command is not
implemented, putting the
TA P
into the
Update
to the
Update-
DR
state while performing a
SAMPLE/PRELOAD
instruction
willhavethesameeffectasthePause-DRcommand.
BYPASS
When the BYPASS instruction is loaded in the instruc-
tionregisterandtheTAP is placed in aShift-DRstate,
thebypassregisterisplacedbetweentheTDIandTDO
pins.TheadvantageoftheBYPASSinstructionisthatit
shortens the boundary scan path when multiple devices
are connected together on a board.
RESERVED
Theseinstructionsarenotimplementedbutarereserved
for future use. Do not use these instructions.