LT1236LS8
15
1236ls8f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
7
8
1
3
4
2
2.00 REF
R0.20 REF
6
5
7
8
6
5
1
2
3
4
4.20 ±0.10
4.20 SQ ±0.10
2.54 ±0.15
1.00 TYP
0.64 TYP
LS8 0609 REV Ø
R0.20 REF
0.95 ±0.10
1.45 ±0.10
0.10 TYP0.70 TYP
1
4
7
8
6
5
1.50 ±0.15
2.50 ±0.15
2.54 ±0.15
0.70 ±0.05
PACKAGE OUTLINE
5.00 SQ ±0.15
5.00 SQ ±0.15
5.80 SQ ±0.15
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
NOTE:
1. ALL DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS PACKAGE DO NOT INCLUDE PLATING BURRS
PLATING BURRS, IF PRESENT, SHALL NOT EXCEED 0.30mm ON ANY SIDE
4. PLATING—ELECTO NICKEL MIN 1.25UM, ELECTRO GOLD MIN 0.30UM
5. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(SEE NOTE 5)
2
3
8-Pin Leadless Chip Carrier (5mm × 5mm)
(Reference LTC DWG # 05-08-1852 Rev Ø)