TPN2010FNH,L1Q Datasheet TPN2010FNH,L1Q | P1-P3

TPN2010FNH

1

MOSFETs Silicon N-channel MOS (U-MOS-H)

TPN2010FNH

Start of commercial production

2013-10

1.

1. Applications

Applications

• High-Efficiency DC-DC Converters

• Switching Voltage Regulators

2.

2. Features

Features

(1) High-speed switching

(2) Small gate charge: Q

SW

= 2.6 nC (typ.)

(3) Low drain-source on-resistance: R

DS(ON)

= 168 mΩ (typ.) (V

GS

= 10 V)

(4) Low leakage current: I

DSS

= 10 µA (max) (V

DS

= 250 V)

(5) Enhancement mode: V

th

= 2.0 to 4.0 V (V

DS

= 10 V, I

D

= 0.2 mA)

3.

3. Packaging and Internal Circuit

Packaging and Internal Circuit

TSON Advance

1, 2, 3: Source

4: Gate

5, 6, 7, 8: Drain

4.

4. Absolute Maximum Ratings (Note) (T

Absolute Maximum Ratings (Note) (T

a

= 25

= 25 



 unless otherwise specified)

unless otherwise specified)

Characteristics

Drain-source voltage

Gate-source voltage

Drain current (DC)

Drain current (pulsed)

Power dissipation

Single-pulse avalanche energy

Avalanche current

Channel temperature

Storage temperature

(Silicon limit)

(Continuous)

(t = 1 ms)

(T

c

= 25 )

(t = 10 s)

(Note 1), (Note 2)

(Note 1)

(Note 3)

(Note 4)

(Note 5)

Symbol

V

DSS

V

GSS

I

D

I

D

I

DP

P

D

P

D

P

D

E

AS

I

AR

T

ch

T

stg

Rating

250

±20

9.9

5.6

19

39

1.9

0.7

34

5.6

150

-55 to 150

Unit

V

A

W

mJ

A



Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the

significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even

if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum

ratings.

Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook

("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test

report and estimated failure rate, etc).

2014-02-25

Rev.2.0

TPN2010FNH

2

5.

5. Thermal Characteristics

Thermal Characteristics

Characteristics

Channel-to-case thermal resistance

Channel-to-ambient thermal resistance

(T

c

= 25 )

(t = 10 s)

(Note 3)

(Note 4)

Symbol

R

th(ch-c)

R

th(ch-a)

R

th(ch-a)

Max

3.20

65.7

178

Unit

/W

Note 1: Ensure that the channel temperature does not exceed 150 .

Note 2: Limited by silicon chip capability.

Note 3: Device mounted on a glass-epoxy board (a), Figure 5.1

Note 4: Device mounted on a glass-epoxy board (b), Figure 5.2

Note 5: V

DD

= 60 V, T

ch

= 25  (initial), L = 1.8 mH, I

AR

= 5.6 A

Fig.

Fig. 5.1

5.1

5.1 Device Mounted on a Glass-Epoxy

Device Mounted on a Glass-Epoxy

Board (a)

Fig.

Fig. 5.2

5.2

5.2 Device Mounted on a Glass-Epoxy

Device Mounted on a Glass-Epoxy

Board (b)

Note: This transistor is sensitive to electrostatic discharge and should be handled with care.

2014-02-25

Rev.2.0

TPN2010FNH

3

6.

6. Electrical Characteristics

Electrical Characteristics

6.1.

6.1. Static Characteristics (T

Static Characteristics (T

a

= 25

= 25 



 unless otherwise specified)

unless otherwise specified)

Characteristics

Gate leakage current

Drain cut-off current

Drain-source breakdown voltage

Gate threshold voltage

Drain-source on-resistance

Symbol

I

GSS

I

DSS

V

(BR)DSS

V

(BR)DSX

V

th

R

DS(ON)

Test Condition

V

GS

= ±20 V, V

DS

= 0 V

V

DS

= 250 V, V

GS

= 0 V

I

D

= 10 mA, V

GS

= 0 V

I

D

= 10 mA, V

GS

= -20 V

V

DS

= 10 V, I

D

= 0.2 mA

V

GS

= 10 V, I

D

= 2.8 A

Min



250

175

2.0



Typ.



168

Max

±0.1

10



4.0

198

Unit

µA

V

mΩ

6.2.

6.2. Dynamic Characteristics (T

Dynamic Characteristics (T

a

= 25

= 25 



 unless otherwise specified)

unless otherwise specified)

Characteristics

Input capacitance

Reverse transfer capacitance

Output capacitance

Gate resistance

Switching time (rise time)

Switching time (turn-on time)

Switching time (fall time)

Switching time (turn-off time)

Symbol

C

iss

C

rss

C

oss

r

g

t

r

t

on

t

f

t

off

Test Condition

V

DS

= 100 V, V

GS

= 0 V, f = 1 MHz



See Fig. 6.2.1

Min



Typ.

460

3.0

45

4.0

5.2

14

4.5

19

Max

600

50



6.0



Unit

pF

Ω

ns

V

DD

≈ 100 V

V

GS

= 0 V/10 V

I

D

= 2.8 A

R

L

= 35.7 Ω

R

G

= 4.7 Ω

Duty ≤ 1 %, t

w

= 10 µs

Fig.

Fig. 6.2.1

6.2.1

6.2.1 Switching Time Test Circuit

Switching Time Test Circuit

6.3.

6.3. Gate Charge Characteristics (T

Gate Charge Characteristics (T

a

= 25

= 25 



 unless otherwise specified)

unless otherwise specified)

Characteristics

Total gate charge (gate-source plus

gate-drain)

Gate-source charge 1

Gate-drain charge

Gate switch charge

Symbol

Q

g

Q

gs1

Q

gd

Q

SW

Test Condition

V

DD

≈ 100 V, V

GS

= 10 V, I

D

= 5.6 A

Min



Typ.

7.0

2.4

1.5

2.6

Max



Unit

nC

6.4.

6.4. Source-Drain Characteristics (T

Source-Drain Characteristics (T

a

= 25

= 25 



 unless otherwise specified)

unless otherwise specified)

Characteristics

Reverse drain current (pulsed)

Diode forward voltage

(Note 6)

Symbol

I

DRP

V

DSF

Test Condition



I

DR

= 5.6 A, V

GS

= 0 V

Min



Typ.



Max

19

-1.2

Unit

A

V

Note 6: Ensure that the channel temperature does not exceed 150 .

2014-02-25

Rev.2.0

TPN2010FNH,L1Q

TPN2010FNH,L1Q

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