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AT93C57W-10SI-2.7

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
AT93C46/56/57/66
7
Timing Diagrams
Synchronous Data Timing
Note: 1. This is the minimum SK period.
Note: 1. A
8
is a DON’T CARE value, but the extra clock is required.
2. A
7
is a DON’T CARE value, but the extra clock is required.
READ Timing
Organization Key for Timing Diagrams
I/O
AT93C46 (1K) AT93C56 (2K) AT93C57 (2K) AT93C66 (4K)
x 8 x 16 x 8 x 16 x 8 x 16 x 8 x 16
A
N
A
6
A
5
A
8
(1)
A
7
(2)
A
7
A
6
A
8
A
7
D
N
D
7
D
15
D
7
D
15
D
7
D
15
D
7
D
15
AT93C46/56/57/66
8
EWEN Timing
EWDS Timing
WRITE Timing
WRAL Timing
(1)
Note: 1. Valid only at V
CC
= 4.5V to 5.5V.
CS
t
CS
11
...
001
SK
DI
CS
t
CS
SK
DI 1 0
000
...
SK
CS
t
CS
t
WP
11
A
N
D
N
0A0D0
... ...
DI
DO
HIGH IMPEDANCE
BUSY
READY
CS
SK
DI
DO
HIGH IMPEDANCE
BUSY
READY
1 0 0 1 ... D
N
t
CS
t
WP
... D00
AT93C46/56/57/66
9
ERASE Timing
TERAL Timing
(1)
Note: 1. Valid only at V
CC
= 4.5V to 5.5V.
SK
1 1 ...1
CS
DI A
N
t
CS
t
SV
t
DF
t
WP
A
N-1
A
N-2
A0
CHECK
STATUS
STANDBY
READY
BUSY
DO
HIGH IMPEDANCE
HIGH IMPEDANCE
SK
CS
DI 1 1000
DO
HIGH IMPEDANCE
HIGH IMPEDANCE
READY
BUSY
CHECK
S TATU S
STANDBY
t
WP
t
CS
t
SV
t
DF
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

AT93C57W-10SI-2.7

Mfr. #:
Buy AT93C57W-10SI-2.7
Manufacturer:
Description:
IC EEPROM 2K SPI 2MHZ 8SOIC
Lifecycle:
New from this manufacturer.
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