LTC2928
10
2928fa
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pin FuncTions
OV: Overvoltage Output. Pulls low when any positive supply
exceeds its configured overvoltage threshold. OV remains
low until all positive supplies have remained below the
overvoltage threshold for a time equal to the configured
RST delay time. To generate an overvoltage fault, con
-
nect OV
to
F LT . The OV output has a weak pull-up to V
CC
and may be pulled above V
CC
using an external pull-up.
OV may be left unconnected if unused. See Applications
Information for details.
OVA: Over Voltage Adjust Input. After configuring the un
-
dervoltage thresholds, bias this input to set the overvoltage
threshold for all positive supplies. Leave the pin floating
to set an overvoltage threshold approximately 32% above
the undervoltage threshold. Tie OVA to V
CC
to move the
overvoltage threshold above 1V. Consult the Applications
Information for details on OVA biasing.
PTMR: Power Good Timer. Attach an external capacitor to
ground to set the maximum time allowed for all supplies
to reach their configured undervoltage threshold during
sequence-up phase (or all supplies below their sequence-
down threshold during sequence-down phase). The timer
is started when the first enable (EN) is raised (or lowered).
The power good timing scale factor is 4000ms/µF. A 0.1µF
capacitor generates a 400ms delay time. If any supply is
late, a sequence fault is generated. F LT pulls low and all
supply enable outputs are pulled low. Disable the power
good timer by grounding PTMR. Consult Applications
Information for more details.
RDIS: Reset Disable Three State Input. Typically used for
supply margining applications. Pull RDIS high or low to
force RST high. Leave the RDIS input open to allow RST
to operate normally.
REF: Reference Output. REF is used to offset negative
supplies connected through resistance to V1. The refer
-
ence will move during sequence-up and sequence-down
operation to effect the selected thresholds. The buffered
reference sources 1mA and sinks up to 200µA of current.
The reference drives a bypass capacitor of up to 1000pF
without oscillation.
RST: Reset Output. If any supply is below its undervolt
-
age threshold, RST pulls low. RST pulls high after all
supplies are above their undervoltage threshold for the
configured delay time (configure delay time using the
RTMR pin). The RST output has a weak pull-up to V
CC
and may be pulled above V
CC
using an external pull-up.
RST is guaranteed low with V
CC
down to 0.5V. Configure
the RST to F LT relationship using the MS1, MS2 inputs.
See Applications Information for details. Leave the RST
output open if unused.
RTMR: Reset Timer. Attach an external capacitor to
ground to set a reset delay time of 4000ms/µF. Floating
RTMR generates a minimum delay of approximately 50µs.
A 0.047µF capacitor will generate a 190ms delay time.
RT1-RT4: Resistive Time Position Configuration Inputs.
Place a single resistor from V
CC
to each input to select one
of eight time positions in which to turn-on or turn-off each
enable output (see Application Information for RT table).
Each RT input numerically corresponds to a respective
EN output and monitor input. During sequencing-up, an
enable output (EN) pulls high at the start of its chosen time
position. During sequencing-down, an enable output (EN)
pulls low at the start of its chosen time position (sequence-
down position is the reverse of sequence-up). To remove
a monitor channel from participation, command any en
-
able off by pulling its corresponding RT input to ground.
Prior to
sequencing, any enable may be commanded on
by pulling its corresponding RT input to V
CC
. Maximum
capacitive load is 150pF.
SQT1, SQT2: Sequencing Threshold Three State Configura
-
tion Inputs. Select sequencing thresholds as a percentage
of the 0.5V supply monitor threshold for positive supplies
and as a percentage of REF for negative supplies. For
sequencing-up choose from 33%, 67% or 100%. For
sequencing-down choose from 100%, 67%, 33% or 10%.
See Applications Information for configuration table.
LTC2928
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pin FuncTions
STMR: Sequence Timer. Attach an external capacitor to
ground to set the adjacent time-position delay between
sequenced supplies. For supplies in adjacent time positions,
this delay resides between the previous supply crossing
its sequence-up (down) threshold and the next enable
(EN) pulling high (low). For a supply in time position 1,
the sequence delay is the time from ON going high to
its enable pulling high. The sequence timing scale fac
-
tor is 8670ms
/µF.
Floating STMR generates a minimum
sequencing time delay of approximately 100µs. A 3300pF
capacitor will generate a 29ms delay time. Referring to the
timing diagrams, the sequence delay time is equivalent
to the cascade (CAS) pin high time. Consult Applications
Information for details.
V
CC
: Power Supply Input/Output. All internal circuits are
powered from V
CC
. Bypass V
CC
with at least 0.1µF to
ground in close proximity to this pin (1µF minimum when
using HV
CC
).
VSEL: Voltage Monitor Select Input. Tie to ground to
select four positive inputs. Tie to V
CC
for three positive
and one negative adjustable input. Negative supplies are
monitored on the V1 input. See Applications Information
for configuration table.
V1-V4: Voltage Monitor Inputs. Connect these high imped
-
ance inputs to external resistive dividers between each
monitored power supply and ground
(
or REF for negative
supplies monitored on V1). See Applications Information
for selecting resistors to configure the monitor thresholds.
Voltage monitor inputs operate with their respective RT
inputs and EN outputs. OV comparators are always active.
Tie unused monitor inputs to GND.
LTC2928
12
2928fa
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FuncTional DiagraM
OV
10uA
RST
10uA
CMP4
10uA
CMP3
10uA
CMP2
10uA
STMR
2uA
22uA
PTMR
2uA
22uA
+
RTMR
2µA
22µA
CMP1
10µA
V
CC
TIMER
CONTROL
3
OUTPUT
CONTROL
SEQUENCING
LOGIC
6
CAS
50µA
100µA
20µA
20µA
100µA
F LT
1V
DONE
EN4
EN3
EN2
EN1
ENABLE CONTROL
V
CP
10µA
4
FAULT
MANAGER
THRESHOLD
CONTROL
V1 POLARITY
CONTROL
GAIN
ADJUST
RT4
ON
8
5
4
4
TIME
POSITION
DECODERS
STATE
DECODERS
RT3
RT2
RT1
12k
12k
12k
12k
RDIS
MS2
MS1
SQT2
SQT1
VSEL
V4
UV/OV
COMPARATORS
V3
V2
V1
OVA
V
CC
V
CP
V
OVA(TH)
V
CC
V
CC
V
CC
V
CC
V
CC
HV
CC
REF
GND
REFERENCE
UVLO
CHARGE
PUMP
REGULATOR
2928 BD

LTC2928IG#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Supervisory Circuits Quad Supply Sequencer/Supervisor
Lifecycle:
New from this manufacturer.
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