LTC3561A
14
3561afa
For more information www.linear.com/LTC3561A
does decrease due to the decreasing voltage across the
inductor. Applications that require large load step capabil-
ity near dropout should use a different topology such as
SEPIC, Zeta or single inductor
, positive buck/boost.
In some applications, a more severe transient can be caused
by switching in loads with large (>1µF) input capacitors.
The discharged input capacitors are effectively put in paral
-
lel with C
OUT
, causing a rapid drop in V
OUT
. No regulator
can deliver enough current to prevent this problem, if the
switch connecting the load has low resistance and is driven
quickly. The solution is to limit the turn-on speed of the
load switch driver. A Hot Swap™ controller is designed
specifically for this purpose and usually incorporates cur
-
rent limiting, short-circuit protection, and soft-starting.
the losses in LTC3561A circuits: 1) LTC3561A V
IN
current,
2) switching losses, 3) I
2
R losses, 4) other losses.
1) The V
IN
current is the DC supply current given in the
electrical characteristics which excludes MOSFET driver
and control currents. V
IN
current results in a small (<0.1%)
loss that increases with V
IN
, even at no load.
2) The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current results
from switching the gate capacitance of the power MOSFETs.
Each time a MOSFET gate is switched from low to high
to low again, a packet of charge dQ moves from V
IN
to
ground. The resulting dQ/dt is a current out of V
IN
that is
typically much larger than the DC bias current. In continu-
ous mode, I
GATECHG
= f
O
(QT + QB), where QT and QB are
the gate charges of the internal top and bottom MOSFET
switches. The gate charge losses are proportional to V
IN
and thus their effects will be more pronounced at higher
supply voltages.
3) I
2
R Losses are calculated from the DC resistances of
the internal switches, R
SW
, and external inductor, R
L
. In
continuous mode, the average output current flowing
through inductor L is “chopped” between the internal top
and bottom switches. Thus, the series resistance look
-
ing into the SW pin is a function of both top and bottom
MOSFET R
DS(ON)
and the duty cycle (DC) as follows:
R
SW
= (R
DS(ON)
TOP)(DC) + (R
DS(ON)
BOT)(1 – DC)
The R
DS(ON)
for both the top and bottom MOSFETs can
be obtained from the Typical Performance Characteristics
curves. Thus, to obtain I
2
R losses:
I
2
R losses = I
OUT
2
(R
SW
+ R
L
)
4) Other “hidden” losses such as copper trace and internal
battery resistances can account for additional efficiency
degradations in portable systems. It is very important
to include these “system” level losses in the design of a
system. The internal battery and fuse resistance losses can
be minimized by making sure that C
IN
has adequate charge
storage and very low ESR at the switching frequency. Other
losses including diode conduction losses during dead-time
and inductor core losses which generally account for less
than 2% total additional loss.
APPLICATIONS INFORMATION
Figure 5. Power Loss vs Load Currrent
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent
-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
LOAD CURRENT (mA)
0.01
POWER LOSS (W)
0.1
0.1 10 100 100001000
3561A F01
0.001
1
1
V
IN
= 3.6V
V
OUT
= 1.2V TO 1.8V
f
O
= 1MHz
